Memory Error in PBIST Self Test

Cristiano Werner Araujo

I have added the PBIST test, but the callback function "memoryPort<X>TestFailNotification" are called 3 times,

2 for port 1 and 1 for port 2.

the values are the following :

	groupSelect	dataSelect	address	data
Port 0, 1st	0x4	0x20	0x0	0xFFFFFFFF
Port 0, 2nd	0x4	0x21	0x0	0xFFFFFFFF
Port 1	0x4	0x21	0x0	0x1

for what I can tell reading from the PBIST sequence in the Ref. Manual, 7.3.1,

I should get from the PBIST run

RGS and RDS values ( table 7.1 )

Failure Count

Memory Address Offset of the first failure

Failure Data,

I suppose groupSelect gives me witch RAM group or RGS and RDS values, but I don't know witch.

DataSelect I don't know what is.

address is the offset from the base address of the RAM group, but as I don't know witch group is, I don't know witch device has failure for certain.

If the groupSelect is the Ram Group, I would be DCAN2 and MIBSPI3.

And data is the failure data.

over 13 years ago

0 Abhishek Shankar over 13 years ago

TI__Intellectual 2310 points

Cristiano,

Thanks for using the forum.

I will look into this and get back to you as soon as I find this info.

0 Abhishek Shankar over 13 years ago in reply to Abhishek Shankar

TI__Intellectual 2310 points

Cristiano,

See below.

groupSelect refers to RGS

dataSelect refers to RDS

So memories with RGS+RDS as 0x04+0x20 and 0x04+0x21 are showing failures. They should be mapped using “PBIST RAM Grouping” section.

These will be DCAN2 memories. However, RDS isn't matching. I am not sure why you are seeing the RDS as 0x20 or 0x21.

0 Cristiano Werner Araujo over 13 years ago in reply to Abhishek Shankar

Intellectual 280 points

Ok, so I'm having error in both DCAN2 (0x4) and VIM(0x8) memories ?

Each error in each memory will raise a error ?

In the figure 7.2 of PBIST chapter, the flow diagram shows taht both RGS and RDS info are found in the RAMT register.

Looking the asm code, I don't see a way that they are divided in 2 registers. Is that correct ?

Thanks,

Cristiano

0 Cristiano Werner Araujo over 13 years ago in reply to Cristiano Werner Araujo

Intellectual 280 points

Other problem that is happening is that, after I run it once the processor starts but warns about the memory like I said before.

But if I reset the processor through the JTAG ( I'm using J-link and IAR )

I got a loop in the dloop in memory test in the following piece of code :

dloop
ldr r6, [r9, #0x10] ; Load Pbist done flag
cmp r6, #0
beq dloop

If I reset ( POR ) it work, but if I run STC again it stops, but I'm not debuging anymore.

My STC and POR resets are working fine with the memory tests.

0 Brian Fortman over 13 years ago in reply to Cristiano Werner Araujo

TI__Expert 7650 points

Hello Christiano,

Are you still needing an answer here? Sorry for the delay responding.

Arm-based microcontrollers

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Memory Error in PBIST Self Test