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NHET pins used as GIO inputs: incorrect values after power on reset?

Other Parts Discussed in Thread: TMS570LS20216

Last week we were developing an application on the TMS570 which used NHET pins as GIO inputs. We noticed that when we debugged the code, everything was working fine and we could read the state of the pins. However, if we remove the JTAG cable and power up the board, we read garbage when reading the pins. Several people had a look at this problem, but no one was able to figure out why it doesn't work after power cycling.

I was wondering if there are any known issues about using NHET pins as GIO inputs, or issues which could cause that the code works while debugging and not after power cycling?

  • Which device? TMS570LS20216? If this is the case, the problem may be:

    In your application, you configure the HET pins as: input, pull down, and pull disabled. This configuration actually means the input buffer is disabled. Try to enable the pull or set pull disabled + pull up.

  • Hello Mr Weng,

    the device is indeed TMS570LS20216, and you suggestion fixes the problem. Thank you very much for this quick reply!

    Best regards,

     

    Wouter.

  • Hello all,

    I have had the exact same issue, and could not find information in silicon errata.

    I confirm that, also using a TMS570LS20216, I have had the same issue: garbage is read from NHET pins used as GIO if pull up/down is disabled, and only when performing a power-on reset (eg, it works fine when attached to the debugger/JTAG, and stops working when standalone/power cycled).

    I confirm also that the fix described works here.

    One piece of additionnal information: I have had the same issue with other GIO banks, for example SPI5: pin 102 on TQFP144, MIBSPI5_SOMI3, which is bit27, shows the exact same behaviour. I haven't tested every other GIO block, but I would guess they behave similarly.

    Best regards,

    C.