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Help:Reset of TMS570LS20216!!!!

Supcon-Jason
Prodigy 140 points
Other Parts Discussed in Thread: TMS570LS20216

TMS570LS20216 TRM note taht SYSECR register have Reset below:

1.PORST  ,

2.OSCRST ,

3.WDRST,

4.CPURST,

5.EXTRST(nREST)

       As we know,PORRST will reset core and peripheral logic and SRAM data will avalid.Can you note the different  about all resets?about influence on ESM channel status,SRAM,PC pointer,or other logic??besides, MCU have any  recoverable fault that after PORRST ,it can recovery ,then nRest can not recover??then maybe list it!! thank you !!

  • 0
    TI__Intellectual 2310 points

    Hi

    Thanks for using forum. I will give you response as soon as I find the info

  • 0 in reply to Abhishek Shankar
    TI__Intellectual 2310 points

     

    		 What is reset?
     Type of reset RAM content Program Counter of CPU ESM status Grp1 and Grp3 ESM status  Non-debug Chip logic
    Grp 2
    POR Unpredictable Y Y Y Y
    OSCRST Unpredictable Y Y N Y
    WDRST Unpredictable Y Y N Y
    CPURST Unpredictable Y N N N
    EXTRST Unpredictable Y Y N Y
    SWRST Unpredictable Y Y N Y

    I have tried to prepare a table which should help you understand the impact of resets.

  • 0 in reply to Abhishek Shankar
    Prodigy 140 points

    1、For Generally MCUs, after nRST SRAM  is predictable(not change)。why this MCU is unpredictable?？

    2、Y ->change,N->not change ??As TRM or Datasheet say,ESM status Grp1 and Grp3 is not changed after nRST,only after PORSRT them change??

    3、Non-debug Chip logic ？？ which logic，detailly？？or maybe list some ？

    Thank you for your applying！！！！

  • 0 in reply to Supcon-Jason
    TI__Intellectual 2310 points

    1. The reason the SRAM is unpredictable is that if the CPU, DMA etc. are in the middle of writing some data and a reset event occurs we cannot guarantee that the write completes.

    2. The TRM is correct. I think I have swapped the Grp1/Grp3 with Grp2 in my table. Sorry about this.

    3. Non-debug logic refers to most of the core logic for eg. the various peripherals, CPU, I/O etc.