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How to change the Return address of ISR function

Other Parts Discussed in Thread: TMS570LS2125, TMS320F28335

Hello,

Im working with TMS570LS2125 MCU.When the interrupt is occurred I have to change the return address to some other location.

Please let me know the procedure to change the return address in ISR function.

Thanks in Advance.

Regards,

Shilpa

  • hi shilpa,

    Can you clarify why you would want to change the return adress in your ISR routine . Would that not upset your data flow.

    -Hari

  •  Hi Hari,

    I have a requirement like have to execute a function for some duration after that by forcibly have to come back from that function . For the above requirement I’m using timer interrupt. So in that ISR I need to the change the return address of that ISR.

    Please let me know what all the registers need to take back up to continue the normal flow.

  • Silpa,

    In an exception handler the return address is stored in the LR (R14) register.

    Here is the usual way to return from IRQ and FIQ:

    1. For FIQ          SUBS PC, R14_fiq, #4
    2. For IRQ         SUBS PC, R14_irq, #4

    Note: Depending on the mode, (IRQ or FIQ) CPU will have a dedicated LR (R14) register.
    The "S" in the subs means that the SPSR_mode will be back up in the destination mode during mode context switch.
    The CPU will be back in the mode prior to the interrupt and the CPSR flags will also be restored.

    If you want to return to a different location that the one stored in the LR, you can do something like:

    LDR PC, Rx with the destination address store in Rx.
    In this case, the CPU will stay in the exception mode (IRQ or FIQ) The link register will still point to the original return address.
    NOTE: At that point, if your code is calling any other subroutine, the LR will be overwritten and you will loose your original return address.

    Another option could be to use the following instruction:

    LDR LR, destination_address
    MOVS PC, LR with LR pointing to your destination address.

    That way you will restore the CPU mode the way it was prior to your exception.
    In this case you will loose your original return address.

    In summary, what you want to do is possible, but needs a lot of attention.

    Regards,

    Jean-Marc

  • Silpa,

    I fully agree with Jean-Marc. The problem is not just exiting ISR to some different address. You will have to save a lot more information in order to returns to the function which is interrupted. Not only it is hard to debug but also it introduce a lot of overhead which also reduce the effectiveness of CPU. It seems that you need to perform some high priority function regularly in your application. I would suggest you taking a different approach.

    Assume that you have one high priority task which has to be executed at some time interval. You can do the processing in the timer ISR. For all other interrupts, you simply set a flag in ISR and quit. In your main loop, you can poll those flags to start processing. In this way, you can guarantee the timing of your critical processing without having the trouble to mess with "irregular" ISRs. You can also define a order to poll those flags to have another layer of priority.

    Thanks and regards,

    Zhaohong

  • Hi Jean-Marc,
    I am also facing same problem. I am interfacing MAX3109 with TMS320F28335 through MCBSP (as SPI). MAX 3109 asserts an interrupt for some events and that interrupt can only be cleared by reading Status Register of MAX 3109.
    To read Status Register, I am waiting for MCBSP receive.
    At the ISR , I want to read Status Register of MAX3109 to clear the interrupt. If I read Status Register at ISR it does not clear the interrupt. If I read the Status Register in main() it clears the interrupt.
    I can't understand what is happening ?
    Can you help me ?