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Enabling Interrupts on HDK

Scott Gove
Prodigy 140 points

Other Parts Discussed in Thread: HALCOGEN, RM48L950

Hi, 

I'm trying to set up a timer interrupt using the RTI module but the Interrupt Service Routine is never called.

I'm using counter 0 and the compare function to generate an interrupt. I have edited the interrupt vector in the 4th position to point to my ISR. This routine is defined using the pragma directive. Configuration of the counter is done properly. Counter is advancing and triggering an interrupt flag when it reaches the value set on the compare register(I can read the counter register and see it going up while debugging, I can also see the register holding the interrupt flags enabling the bit for this interrupt). I also enabled the interrupt for this compare on the SETINT register of the RTI module. 

I am guessing there is an interrupt enable function or a global interrupt enable register that I am missing. Please let me know what comes to your mind or point me to an example.

Thanks in advanced,

 

  • 0
    TI__Mastermind 22715 points

    Scott,

    You can follow the procedures described in this forum thread.

    http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/183311/661264.aspx#661264

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    Prodigy 140 points

    Hi Zhaohong,

    Thank you for your answer.

    I have a couple of questions regarding the post:

    1 Isn't this supposed to be covered with Halcogen if the tool is used?

    2 Does this information apply for the RM48L950?

           - If yes, could you clarify step 2?  (Set up the VIM interrupt request mask register so that the interrupt can be recognized by VIM)

           - If not, could you clarify step 2 and 4? (Set up the VIM interrupt request mask register so that the interrupt can be recognized by VIM) & (Set up R4 CP15 register to enable hardware vector mode)

    Thank you,

  • 0 in reply to Scott Gove
    TI__Mastermind 22715 points

    Scott,

    I think that Halcogen should cover steps 1-3. I am not sure how step 4 is handled in Halcogen. I can ask Halcogen developers.

    TMS570 and RM devices have the same CPU. TMS570 supports big endian and RM supports little endian. TMS570 interrupt setup procedure is also applicable for RM devices.

    There are three VIM interrupt request mask registers. Each bit in those registers is associated to an interrupt request. The bit needs to be set to one in order for VIM module to recognize the specific interrupt request. It should be set up by Halcogen if you use the tool.

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    TI__Guru 59540 points

    Hello Scott:

    Did the information provied by  Zhaohoang answer your questions? If so, please mark his answer(s) as verified so that we may close the thread and others who reference this answer can have confidence in the answers provided.