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TMS570LS3134, 3137

Other Parts Discussed in Thread: TMS570LS3134, TMS570LS20216, TMS570LS3137, HALCOGEN

1 How is the availability for the PGE package, when is the expected release date?

2 Their data sheets do not show any difference regarding their pin out of 144 PGE package. Is it true or an error?

3 For the N2HET module, can it support 3 32 bits counter simutanuously? Since in the reference manual, I got 7 bit hardware counters(up to 8 I think), but 2 25bit vertual counter, is the number per channel or overall? If overall, that means only 2 32bits counter can be supported. Is it right?

4 For MIBSPI and I2C, I2C is shared pinout with MIBSPI3CS[2] and MIBSPI3CS[3](also N2HET or GPIO). However in the reference manual, SPI Pin Control Register 0 (SPIPC0), bit 7-0 define it as SPI or GPIO. In the I2C Pin Function Register (I2CPFNC), bit 0 defines its I2C or GPIO. There may be similar defination in N2HET. So which one takes the priority. We need to use MIBSPI, but one CS is ok, also we need I2C. Is it possible on the 144 PGE package? 

  • Huichun,

    For the release data of the PGE package, I would suggest you contacting your local TI sales office.

    I think that the pinout of TMS5703134 PGE package is wrong in the datasheet because there is no Flexray module on TMS5703134. I will contact the datasheet owner.

    NHET module is a uP by itself. You can program it for multiple timer functions. A channel here is actually referred to a pin here. The "counter" functions in NHET is 25 bit.with 'loop time resolution". In order to get better resolution on the pin. A high resolution delay can be added for pin action. This HR delay is also programmable as 8 bit.

    The function you are asking is achievable. There is a PINMUX module which will allow you to select the pin function you need.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    Thanks for the quick responce.

    I will contact local distributor about the part availability. 

    If  the pinout of TMS5703134 PGE package is wrong, would you mind helping for the follow up or forwarding the direct contact information, what these pins are used for. Also the GIO port only has GIOA[2], [5], [6], [7], not 8 bit. We are in the finalizing the design, the latest information will be very helpful.

    For the NHET, I think I need to clarify that what we we need is 3 32-bits counter for external events(rising edge) simutanuously, definately they will be connected through different pins(or channels) . The NHET is very powerful, and in the reference manual, it is mentioned to have the feature that 7-bit hardware counters for each pin allow up to 32-bit resolution in conjunction with the 25-bit virtual counters. We just want to make sure the 32 bit here is the 32 bit counter we are talking about, and the 25-bit virtual counter is available for each individual channels.

     For the I2C and MIBSPI3CS, if we can mux the individual un-used CS[2],[3] to I2C though we still use that MIBSPI3 interface, in the software implementation, which one will do the job?

    Thanks a lot, since we are still in earlier design stage, we can not test, and we can not so detailed information from the reference manucal either. So appreciate your information.

  • Zhaohong,

    I got in the section 4.6 of the reference manual about  how to mux the individual un-used CS[2],[3] to I2C. Is it the module you mentioned? However if the N2HET pin is not used for its function or muxed function, but just GIO, where should we define it, can the defination be for each pin individually? Some as counters, some as event source, and some as GIO. Or it is started as GIP by default, and these MUX control register can change it?

    Also for TMS3134, it is supposed to have one general SPI in addition to the 3 MIBSPI, I did not find out in the data sheet of 144 pin out. But it is mentioned here page 256 of reference manual. want to confirm it is definately available.  

    Also I still did not get clear answer from the reference manual about 32 bit counter up to 3 channels. 

    Thanks

  • Huichun,

    For TMs570LS3134 pinout, please use the terminal function table starting at page 12 of the datasheet. The table is correct although the picture on page 10 has mistakes. You can find SPI4 pins in the table.

    From the table on TRM section 4.6, you can see that each muxed pin can be configured up to 4 different functions. Those pins are in the default function after reset, then you can use pinmux module to change them pin by pin individually.

    On N2HET, you should be able to 32 bit capture on all N2HET pins if you want. For timer capture, I think that you need to specify the resolution in absolute time (how many ns for example). If you want measure a width of a pulse, you need to specify the minimum and maximum width of the pulse in your application and the accuracy requirement. In this case, if you can provide information about all the functions you expect N2HET to perform, we can do a theoretical analysis to see if it is feasible.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    SPI4 question is cleared.

    So TMS570LS3134 and 3137 are actually pin-pin compatible if we do not care the Ethernet and Flexray function and pins. Is it true? 

    For the pin mux, in the data sheet section 2.4(from page 12), we can see a lot of pins can be GIO especially N2HET. However in the TRM section 4.6, we did not see GIO is in the defination of the mux table. (I do not mean GIOA, GIOB, but general GIO). So where the GIO function for the pins are defined?

    Our 3 32 bit counter function is simple, we do not care pulse width or timer resolution, just count whenever there is a rising edge. I think the part can do the counter function, but 3 32 bits counter at the same , I do not know. This is what I what to confirm.  

    Thanks  a lot,

    huichun

  • Huichun,

    You are right on pin compatibility.

    If you want to use GIO functions from N2HET, you need first use the pinmux module to configure the pins as N2HET function. Then you can control the GIO function from N2HET registers.

    On the counters, N2HET can definitely do the work described in your email. I still think that the accuracy requirement is important if you care about the timing of those three rising edges.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    Thanks a lot. I think some answers apply to other TMS570 parts as well. One more thing,

    TMS570LS20216 is certified for use in SIL3 Applications.  

    TMS570LS3134 or 3137 are also used for Safety Critical Applications, however I did not see they are certified for SIL3 information on their website. Would you mind checking if they have been certified? If not,  will they be certified finally and when as expected?

    Thanks a lot,

    Huichun

  • Zhaohong,

    We are using MIBSPI to work with AD7356 as attached(buffer is what we prefer due to the ADC timing). AD7356 is two channel synchronized ADC. It is kind of SPI interface, in the sense that it has some special timing and also it has 1/CS, 1CLK, but two data out.

     I checked the timing, I think MIBSPI can handle it since it has register about delay setting also the polarity/phase.

    For two data out, can we use MIBSPI1 as master(drive CS CLK out, and receive from SPIMISO for one channel data) and MIBSPI3 as slave(receive CS CLK, and receive from SPIMOSI for another channel). I can not figure out a way both are working as masters and get synchronized data at the same time.  

    Just want your technical confirmation or comments.8535.AD7356.pdf

  • Huichun,

    TMS570LS3134 is not sil3 certified yet..

    You should be able to use MibSPI with AD 7356. In page 7 of AD7356 spec, you can find the following.

    "If CS is held low for a further 16 SCLK cycles on either SDATA or SDATAB, the data from the other ADC follows on the SDATA pins. This allows data from a simultaneous conversion on both ADCs to be gathered in serial format on either SDATAA or SDATAB."

    You can program MibSPI so that CS will be held low to two 16 bit data.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    Thanks,

    Our sensor part has a ADC strobe, which we will use for MIBSPI event trigger source. The minimum seperation between continuous strobe may be 1us, which means we need to do the simutanuous ADC at 1M sampling/second in worst case.

    The MIBSPI maxiumum baud rate is 20M, by 16 bit SPI frame(once channel), we can meet the sampling rate requirement. However if we pass the data out from one SPI data line, which is by 32 bit SPI fram, we can only get 625K sampling rate. Due to this reason, we wnat to use two MIBSPI instead of one to implement dual channel at the same time to double the throughout.

    regards,

  • Huichun,

    If you want to use two MibSPI to connect to ADC. Only one can be master.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    One more thing, if we need external interrupt connection(more than 2, maybe level or edge), it is suggested to connect through GIOA(4 available for 144 package) or N2HET2 pin? 

    From the data sheet section 4.15.2, table 4-31, the 96 Interrupt Request can be assigned to either GIO or N2HET1, however only 1 for GIOA, 2 for N2HET1(level0 and level1).  It does not differentiate its GIOA(2) or GIOA(5), and N2HET1(n).  Can we program the interrupt source as individual pin and how?

    Another in addition to the external ADC connected to the MIBSPI, we want to use the MIBADC of the cip to see if it works so we can eliminate the external one . So I connect the ADC strobe signal to one event source N2HET1[08] for both MIBSPI and MIBADC. So the question is how much the delay difference is expected between different MIBADC channels and between MIBADC and MIBSPI?

    Thanks a lot,

     

  • Huichun,

    GIO functions from other modules (including NHET pins) cannot generate interrupt. You will have to use GIOA or GIOB pins to generate interrupt.

    We do not have data about difference between MIBADC and MIBSPI in response to a external trigger. However, I do not think that this time would be an issue in your application. This response time different is a constant value and the A/D data acquired by MIBADC and the one from MIBSPI (external ADC) is going to be synchronous. Your system will not see any difference if you sample fast enough.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    The internal ADC CLK is Fvclk/(PS+1), and Fvclk is maxium at 100MHz. For 12 bit ADC resolution, that means we can get maximum almost 8MHz sampling rate simutanuously?

    Thanks,

  • In data sheet 5.2.1, page 114, it is mentioned Total Sample/Hold/Convert time: 600ns Typical Minimum at 30MHz ADCLK.

    Also in the reference manual, section 18.2.2 and 18.2.3(page 810), there is acquisition time.

    So even I can set ADCCLK as 100MHz, how mauch the sampling rate simutanuously we can get with the consideration of acquisition, Sample/Hold/Convert time?

  • Huichun,

    It is not able to run this fast. You should look for the electrical ratings from the device spec. On page 114, it says "Total Sample/Hold/Convert time: 600ns Typical Minimum at 30MHz ADCLK". ADC clock is also limited to 30 MHz

    Thanks and regards,

    Zhaohong

  • if 600ns is the total time(I still do not know the acquisition time), it is close to our 1M sapmling rate requirement, however I also saw the MUX structure on data sheet page 120, which means two channels can not be simutanuously sampled if we connect them both to ADC1. So is it possible one on ADC1 and another on ADC2 for simutanuous sampling if trigger by the same event?

  • Huichun,

    If you want to sample two channels simultaneously, using two ADCs is only option. On TMS570, you will need to trigger two ADCs with the same signal.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    For MIBSPI, if we need just 4 wire (CS, CLK, SIMO, SOMI), what we should do to take care of the SPIEN signal? Ignore it at all, or connect to fixed level. We use two MIBSPI, one master and one slave to access the AD7356.

    Also for the trigger source, based on data sheet 137-139, it can be connected to GIOA or certain N2HET1, however if we are using rising edge of  external hardware signal as trigger,  is it required to be connected on GIOA only? Is N2HET1 connection just for trigger based on timer?   From Reference manual, page 1540, I did not get the information clearly.

    Thnaks,

  • Zhaohong,

    I am the colleage of Huichun, working on the same design.

    This is a question about the external crystal connection of TMS570LS20216.

    (Earler I was working on 20216, now, we want bigger internal RAM, so turn to 3134 and 3137)

    (1) according to datasheet, the two caps for the crystal should connect to Kelvin_GND, and not connect to other GND pins. 

    But I realized the evaluation board schematic does connect the Kelvin_GND to the general GND.  Does this mater much? 

    (2) The datasheet of TMS570LS20216 shows 333 BGA package has Kelvin_GND, but the 144 LQFP package has not.

     Is this true? for this case, should I just connect the two caps to general digital ground?

    Thanks,

    Yanzhong

     

  • Yanzhong,

    I would suggest you following EVM schematic because it is a proven circuit. On the 144 pin package, I would suggest you connecting the two caps to the the ground pin next to OSCOUT pin. The general rule is to make the wiring as short as possible.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    can you answer the questions below, which are also listed before yanzhong's question.

    For MIBSPI, if we need just 4 wire (CS, CLK, SIMO, SOMI), what we should do to take care of the SPIEN signal? Ignore it at all, or connect to fixed level. We use two MIBSPI, one master and one slave to access the AD7356.

    Also for the trigger source, based on data sheet 137-139, it can be connected to GIOA or certain N2HET1, however if we are using rising edge of  external hardware signal as trigger,  is it required to be connected on GIOA only? Is N2HET1 connection just for trigger based on timer?   From Reference manual, page 1540, I did not get the information clearly.

    Thanks,

  • Huichun,

    You can leave SPIEN as GIO (default condition) and ignore it for SPI operation. For the MibADC triggers, all pins in the default trigger table can be used to take an external signal to trigger MibADC. You will need to configure those pins as inputs. In the alternate trigger table, only ADEVT pin can take an external signal.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    I had downloaded the TMS570LS31HDK User Guide, but the schematic in Appendix A is very blurred, thus very hard to trace the signals.

    Here comes another question about TMS570LS3137 MCU 20-pin JTAG connector signals.

    (1) Connector pin-8 has a 10K pull-up and 0.1uF cap to GND. the signal is "JTAG_SEL".   It seems JTAG_SEL comes or goes to another connector.  Please provide some explanation about this signal. 

    For our application, only this MCU on board, no DSP or other device using JTAG port.

    (2) Connector pin-3, the nTRST signal.  It has a 10K pull-up through a FET, which controlled by /POR_RESET signal.  Please give some explanation about this design.

    Thanks,

    Yanzhong

  • Yanzhong,

    (1) On the HDK, TI XDS100 emulator is part of the design and always connected to JTAG. When an external emulator is plugged in, the emu_sel will be pull down by external emulator to disable XDS100. In your design, you can simply connect this pin to ground.

    (2) The circuit on pin 3 is a hardware workaround for a startup  issue on rev. A silicon. This issue is fixed on rev B. If you use rev B silicon, you can simply use a pull up to 3.3V.

    Thanks and regards,

    Zhaohong

  • Hi Zhaohong,

    Hope I still can get your help from the forum.

    My prototype board is available now, which has TMS570LS3137 on board. and I am using IAR Embedded Workbench IDE to try the initialization.

    I can set the registers for SPI interfaces, SCI port etc. But however, the I2C port registers can not be changed.

    After reset, all the I2C associated registers have "0x0000". They can not be changed whatever I tried. (for example, first set nRST bit to "1" to have I2C module get out of reset)

    Is there any special consideration about the I2C port?

    I set IOMM_PINMMR00 to be 0x01010000 to set bit16 and bit24 as I2C function. It also does not work.

    Hope to get some idea from you.

     

    Thanks,

    Yanzhong

     

     

  • Yanzhong,

    What package do you have? You may need to check that datasheet to see if the power domain for I2C is turned on by default for your package.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    I am using the TMS570LS3137 PGE (144pin) package. The datasheet has the color codes which shows I2C is in #3 power domains, the same domain is shared by MibADC2, N2HET, SPI4, SCI etc.

    I realized that for some modules, the module has to be set to "release from reset status" before its registers can be programmed. Normally, it's the first register bit-0 to control the module reset or enable function.  I already tried programing SCI and SPI registers, they did work.

    For I2C module, there is nIRS bit in I2CMDR (bit-5) as I2C reset enable bit.  However, write to this bit does not change anything, the registers still can not be programmed - it seems the I2C module still in reset status. (using IAR workbench to check and modify the registers or write codes to write to registers. - Did not pop up any error message, just executed writing, nothing happened).

    By the way, I have two GPIO pins - multiplexing function (pin-97 "MSPI5nEN" and Pin-124 "N2HET1[12]").  If I programmed them as Input GPIO pin, I can read the input data change correctly. However, if I programmed them as Output GPIO pin, the output stay at "1" no matter what I write to this pin.  Do you have any clue for this issue?

    Thanks,

    Yanzhong

     

  • Yanzhong,

    For the I2C issue, I think that you did not enable I2C in PCR so that the clock to I2Cis disabled. You can try the following code

        register SYSTEM_ST *sys_ptr  = (SYSTEM_ST *)0xFFFFFF00;
        register PCR_ST *pcr_ptr  = (PCR_ST *)0xFFFFE000;

     // Enabling the peripherals
     sys_ptr->CLKCNTL_UN.CLKCNTL_ST.PENA_B1=1;
     
     // Setting the Peripherals out of powerdown mode
     pcr_ptr->PSPWRDWNCLR0_UL = 0xffffffff;
     pcr_ptr->PSPWRDWNCLR1_UL = 0xffffffff;
     pcr_ptr->PSPWRDWNCLR2_UL = 0xffffffff;
     pcr_ptr->PSPWRDWNCLR3_UL = 0xfffffff

    You can find the address offsets of the registers in the above code from system/architecture spec.

    For your GIO issue, I believe that you did not set up the pinmux (IOMM) correctly. For most muxed pins, the nux only applies to the output. the inputs are all tied together.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    Thanks for the reply.

    I am trying the testing code based on IAR geting started example code (I have the evaluation board of the ZWT package MCU).

    The example code does already include the peripheral out of power down mode setting and enable peripheral clock (CLKCNTL.PENA_B1=1).

    and I tried the I2C registers using the evaluation board, it's the same thing.

    I will spend more time on I2C port later, see what I can get.

     

    Today, I just tried the SCI port, which I use as UART. The TX function just works right, I can see the data sending out of the TX pin.

    However, the RX function does not work. I tried setting as loop-back, or externally loop TX back to RX,  but either way can not receive any data. and the flag register did not show any status change. (I did enable both TX and RX, and set the pins as TX and RX function)

    When step by step ran the code, I found that as long as CLKCNTL.PENA bit was enabled, the SCI1FLR (SCI flag register) got a value 0x00000904. It never changed again unless power down even if the TX worked well, even if software reset SCI. 

    SCI1FLR bit-2=1 stands for "The idle period has not been detected; the SCI will not receive any data".  What does this mean?

    Regards,

    Yanzhong

     

  • Yanzhong,

    For I2C, you also need to check if the related PCR bit is set. I tried reading and writing I2Cregisters on EVM and did not see any issue.

    The SCI data line should be high between transfers. Can you use a scope to record the TX data to see if they are correct?

    Thanks and regards,

    Zhaohong

  • Zhaohong,

     

    1. About the I2C port, I checked the PCR registers, all bits were set to '0' before I2C configuration instruction, which means all the modules were enabled.

    My I2C setting starts below instructions, while ran through them, no errors reported, but the registers values remain all '0'. no update.

    Please help check anything wrong, or could you please post your code I2C port for my reference.

    I2CMDR = 0x2C20U;   // release I2C from Reset status    

    I2COAR = 0x007FU;  // Own Adder, bit-0 to bit6  

    I2CIMR = 0x0000U;  // Interruption Mask Register ("1" = enable)  

    I2CMDR = 0x2C00U;    

    I2CPSC = 0x0008U;  // set prescaler

    I2CCKL = 0x002DU;

    I2CCKH = 0x002CU;

    I2CMDR = 0x2C20U; // set nRST=1 to latch I2CPSC, I2CCKL, and I2CCKH setting  

    I2CSAR = 0x000EU; // Slave address:   

    // I2CDRR => Read for I2C data receive register (bit0-7)  

    I2CDXR = 0x0055U; // I2C Transmit Reg. Data in bit0-7

     

    2. For the SCI port, I did see the transmitting data waveform on the scope, and the baud rate was that expected.

    The issue is I can not read back data no mater internal or external loop back. Also can not see the Flag register value update, its remains a fix value "0x00000904".

    I just check the ref manual section 26.5 "SCI configuration", the code follows the steps, but still can not read data. Below is my code for your reference

     SCI1GCR0 = 0x00000001U; // SCI moudle out of reset state.  

    SCI1GCR1_bit.SW_nRST = 0;  

    SCI1GCR1 = 0x00000003U; 

    SCI1FORMAT = 0x00000007U; // character length is 8 bit long  

    SCI1PIO0 = 0x00000006U; // SCI/LIN TX and RX pin  

    SCI1BRS = 0x00000040U;  // PLL Option-1, 57.6K baud rate

    SCI1GCR1_bit.CLOCK = 1;  

    SCI1GCR1_bit.CONT = 1;  

    SCI1GCR1_bit.LOOP_BACK = 1;  

    SCI1GCR1_bit.RXENA = 1;  

    SCI1GCR1_bit.TXENA = 1;  

    SCI1GCR1_bit.SW_nRST = 1;

    SCI1TD = 0x00000055U;  //Transmit Data buffer (bit0-7)    

     SCI1TD = 0x00000033U;    //Transmit Data, did not see waveform on scope due to "loopback" mode was enabled

    TestSCIFlag = SCI1FLR;    //!!- did not see flag reg update 

    TestSCIRX = SCI1ED; // !! did not see any data 

     SCI1GCR1_bit.LOOP_BACK = 0;  //disable internal loop back   

    SCI1TD = 0x000000AAU;   // saw waveform on scope   (but can not read back data when loop back externally) 

    SCI1TD = 0x00000055U;   // saw waveform on scope  

    SCI1TD = 0x000000FFU;   // saw waveform on scope

     

    Thanks,

    Yanzhong

  • Yanzhong,

    For I2C issue, I would suggest you check if you can change the register values in CCS memory window. I wonder if you are writing the correct address. You can check the address CPU actually writes by stepping through the dis assembly window and viewing the register values. I am attaching an example code for configuring I2C.

    0005.i2c_cfg.c

    For your SCI issue, I would suggest using the LIN module in SCI mode as the start of experiement. The SCI module is a LIN module without LIN support. LIN RX and TX pins are default. You do not need to worry about pinmux. I am also attaching a SCI configuration code here.

    7345.lin_cfg.c

    I would suggest you using TI Halcogen tool for setting up I2C and SCI.

    Since this thread is very long, I would suggest you starting a new thread for new questions.

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    Thanks for the reply. I will be back on this after the holiday vacation.

    Wish you merry Christmas and happy new year!

    Yanzhong

  • Yanzhong,

    Do you need more information on this topic? Would you please select the "verified" button if you consider that this question is answered?

    Thanks and regards,

    Zhaohong