TMS570LS20216-ZWT maximum TPIU clock frequency

Hello,

The data you are looking for can be found in SPNS141F, the datasheet for the 20216 product.  While there are multiple clocks utilized in the TPIU, I believe you are referencing the ETMTRACECLK output.  Per P. 89 of the datasheet, the maximum ETMTRACECLK frequency is 40 MHz.  As the TPIU outputs data on both edges of the output clock, this equates to 80 MHz data rate.

ARM defines the TPIU's ETMTRACECLK output to be half the frequency of the input trace clock.  In a standard ARM design, you have no control of the clock.  In the TMS570 design, we have implemented a user programmable clock source multiplexor which allows you to select either the internal VCLK or a clock input from a device pin.  The MMR control for this function is done using the ARM TPIU's EXTCTRLOUT[1:0] register bits.  

The ARM TPIU is documented in ARM's CoreSight Components TRM, ARM DDI 0314H, which is available at ARM's website.  The TPIU's EXTCTRLOUT register is at offset 0x404 from the module's base address.  The base address is defined in the 20216 datasheet as 0xFFA0_3000 from the CPU's memory map perspective.

Regards,

Karl

Hello Huw,

Did the information that Karl provided answer your question? If so, please mark his answer as verified so that we may close the thread and others may use it to resolve similar questions.

Hi Chuck,

Yes, Karl did answer my question about TPIU clock frequency.

I am interested to know how to write a GEL script to change the TPIU clock frequency.

Thank you,

Huw

http://processors.wiki.ti.com/index.php/GEL