TMS570 HET Instruction PCNT

Brent Shen

Hi there,

1) In Figure 18-21 of TMS570 TRM, what is the Input Pin Sync'd? Is it some built-in hardware associated with the corresponding Input Pin (which is also in Figure 18-21)?

2) Please verfy my understanding of PCNT below. Assume that LRP = 4 x HRP => lr = 4, the counter type (P[7:6]) = RISE2FALL, and Input Pin CC0 is measured.

On the reset edge (e.g. rising edge) on CC0, the HR counter is reset to 0, and it will increment on the subsequent rising edges of HR clock until a falling edge is detected on CC0.
During the HR counting process, the C[24:0] field (Period Value) of PCNT is incremented whenever the HR counter overflows (e.g. the value of HR counter goes lr - 1 to 0; in this case, 3 to 0).
On the capture edge (e.g falling edge) on CC0, C[24:0] + 1 is copied to D[31:7] of PCNT as well as the value of HR counter + 1 is copied to D[6:0].

3) In Question 2), I'm not quite sure if the start and capture action of PCNT is based on the Input Pin or the so-called Input Pin Sync'd in Figure 18-21 of TMS570 TRM.

4) If there is another HET instruction in HR mode on CC0 next to the PCNT in Question 2 above, will the execution of this instruction disturb that of PCNT? Or there must be one HET instruction in HR mode is allowed on the same HET pin?

Thanks a lot,

Brent Shen

over 13 years ago

0 Charles Tsai over 13 years ago

TI__Guru**** 191886 points

Hi Brent,

1. There are two counters associated with the PCNT. One is a high resolution counter which is 7 bits. The high resolution counter increments based on the HR clock. Another counter is a 25-bit low resolution counter which increments based on the loop resolution clock (LRP). The input pin sync'd illustrated in the figured is an built-in hardware synchronizer. As an input pin can be asynchronous to the loop resolution clock (LRP), the input pin will be synchronized to the LRP first before performing edge detection to increment the virtual low resolution counter.

2. It depends if you are using the high resolution mode for PCNT or only low resolution mode. To illustrate how PCNT, let me start with only using low resolution mode. An input signal is first synchronized to the LRP. At the beginning of the LRP an edge detection is performed by comparing the previous state of the pin and the new input sync'ed state of the pin. When a PCNT instruction is executed it will istart ncrement the counter based on the outcome of the edge detection. Since you are trying to measure the high phase (RISE2FALL) of a pulse, as soon as an rising edge is detected the virtual counter in CF[24:0] starts to increment by one in each LRP until a falling edge is detected. There is a separate HR counter. If you enable HR mode, then the input directly (not the input pin sync'd) signal will be used to detect the edge and if an edge is detected the HR counter starts to count based on HR clock. The counter will keep counting until it overflows and repeats again until a falling edge is detected by which time the final HR value is frozen. When the PCNT is executed it is both the low resolution counter C[24:0] and the HR counter value got copied into the D[31:0].

3. As I just explained in #2, the virtual counter reset and capture edge is based on the input pin sync'd while the HR counter is based on the input. Note that the diagram is for illustration. There is actually a two stage synchronizer between the input pin and the input pin sync'd. The raw input into the device is first passed through a two stage synchronizer to resolve any metastability to the flip flops.

4. There is only one HR counter per pin. You can not use CC0 on mulitple instructions.

regards,

Charles

0 Brent Shen over 13 years ago in reply to Charles Tsai

Intellectual 335 points

Hi Charles,

Thank you for the info above. Please see if the following makes sense to you. Assume PCNT in HR mode.

1) Virtual LR Counter, C[24:0], is clocked by LR clock and detects reset & capture edges of the synchronized input signal (which is the output of the two-stage synchronizer fed with the direct input signal).

2) HR Counter (which is a hardware counter per HET pin) is clocked by HR clock and detects reset & capture edges of the direct input signal (not the sychronized input signal).

3) When PCNT is executed, both LR counter and HR counter are copied to the immediate data field of PCNT.

Thanks again,

Brent Shen

0 Charles Tsai over 13 years ago in reply to Brent Shen

TI__Guru**** 191886 points

Hi Brent,

Your understanding is correct for #1, and #2. On your #3 statement, I just want you to know that the copy to the immediate data field of PCNT is only done when the capture edge is detected, not every LRP, otherwsise, your understanding on #3 is also correct.

regards,

Charles

0 Brent Shen over 13 years ago in reply to Charles Tsai

Intellectual 335 points

Hi Charles,

Thank you for your reply.

Regards,

Brent Shen

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TMS570 HET Instruction PCNT