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Halt execution on TMS570 with connected debugger immediately

Erich Ebenhoch
Intellectual 255 points

Hello!

Is it somehow possible to stop code execution of the TMS570LS3xxx only via a connected JTAG debugger?

This is what i actually need:

  • Connect JTAG debugger to target
  • Power-On TSM570 - No code execution on CPU because of the attached JTAG
  • Connect with Debugger (in our case Trace32) to the target
  • Run target with the debugger connected

Background: Our external Watchdog (TPS65xxxx) will be set to active during startup. This leads to great difficulties working with an debugger on this target, as the watchdog always resets the CPU view nPORRST.

best regards,

Erich E.

  • 0
    TI__Mastermind 23000 points

    Erich,

    Take a look at the vector catch feature built into the R4F.  You can set the vector catch to stop on a reset vector, then use the ICEPICK advanced reset to reset the CPU via your debugger.  This will give you debug capability from start of a warm reset state at address 0x0.  This is possible using the TI CCS tools; I cannot say whether the hardware functionality is supported in Trace32.

    Regards,

    Karl

  • 0 in reply to KGreb
    Intellectual 255 points

    Thanks for the reply. But this still does not solve the problem. The CPU will still executed code when I power the target. This again will lead to a configuration of the TPS.

    So I think it is not possible with this CPU, to attach the Debugger in Target-Power-Off state, which halts the CPU at power-on.

    Btw: This feature is supported by TRACE32.

    BR,

    Erich

  • 0 in reply to Erich Ebenhoch
    TI__Mastermind 23000 points

    Hello Erich,

    You are correct, this would only allow debug of code from a warm reset, not a cold reset.  There is no capability defined in ARM's Coresight debug architecture which allows  halt and debug from a cold reset.  In fact, to implement such feature would break other areas of ARM debug architecture compatibility.  This is a known limitation of ARM's current CoreSight debug architecture.

    Best Regards,
    Karl