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[Urgent]Why does this happen: read ADC conversion results from FIFO queue but sometimes will get value 0

Fumin Li
Intellectual 510 points
Other Parts Discussed in Thread: TMS570LS20216

Hi Experts,

MCU: TMS570LS20216

IDE: CCSV4

Debug: JTAG

ADC module Configure: configure adc1 group1 RAM size to 16 words, sample four channels: ADSIN[8],[9],[10],[13].  sample frequency:10KHz (conversion triggered by NHET pin), read the conversion results in adc interrupt, this interrupt happen frequency is also 10KHz.

Reading the group’s conversion results from a FIFO queue.

Test method: Use a stable power and input 3V to these four ADSIN[x] pins, then debugging, always it can get the correct conversion results, but sometimes, it will get value 0. Please help me to find why it happens?  Does the sample frequency is too high? And how to solve this problem? Thanks so much.

 

Related Code is following:

static volatile unsigned ADC_FIFO_Buffer;

adcData_t g_ADC1_Group1_AdcResult[4];

 

while (((adcREG1->GxINTFLG[adcGROUP1]) & 0x08) != 0x08)

{

}

adcREG1->GxINTFLG[adcGROUP1] = 9U;

ADC_FIFO_Buffer = adcREG1->GxBUF[adcGROUP1].BUF0;

g_ADC1_Group1_AdcResult[0].value = (unsigned short)(ADC_FIFO_Buffer & 0xFFFU);

ADC_FIFO_Buffer = adcREG1->GxBUF[adcGROUP1].BUF0;

g_ADC1_Group1_AdcResult[1].value = (unsigned short)(ADC_FIFO_Buffer & 0xFFFU);

ADC_FIFO_Buffer = adcREG1->GxBUF[adcGROUP1].BUF0;

g_ADC1_Group1_AdcResult[2].value = (unsigned short)(ADC_FIFO_Buffer & 0xFFFU);

ADC_FIFO_Buffer = adcREG1->GxBUF[adcGROUP1].BUF0;

g_ADC1_Group1_AdcResult[3].value = (unsigned short)(ADC_FIFO_Buffer & 0xFFFU);

  • 0
    TI__Mastermind 20090 points

    Hello,

    Thanks for attaching the key elements of the code; it clarifies the description.

    I have a couple of questions in regard to your problem:

    -1- Does this problem occur when the device is running without debugger interaction (e.g halt, breakpoints)?

    -2- You are polling the G1_END flag so I guess that this interrupt is not enabled. However, you are also clearing the G1_THR_INT_FLG which would trigger when the threshold of conversion results is reached. Are any G1 interrupts enabled that could be interfering with the FIFO readout that you have attached?

    Regards,

    Forum Support

  • 0
    TI__Mastermind 22715 points

    Fumin,

    From your source code, I assume that you are using the 12 bit mode. We have done similar tests in our validation and did not observe this issue. I would suggest to check your software first.

    To debug this issue from your side, I would suggest you reading the ADC FIFO in 32 bit mode.  The upper 16 bits contains the status associated with the data. You can first check if the value 0 is a valid conversion.

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    Intellectual 510 points

    Dear Zhaohong,

    Yeah, I am using 12-bit mode. And read ADC FIFO is also in 32bit mode via statement like “ADC_FIFO_Buffer = adcREG1->GxBUF[adcGROUP1].BUF0;”, but I didn’t care the channel id field, due to read adc result is done is ISR.

  • 0 in reply to Kevin Lavery
    Intellectual 510 points

    Dear Kevin,

    Thanks for your answer.

    1.Yeah, it occurs. I debug with WinIDEA IDE (it is similar as CCS, but can watch variable value in real-time) and keep software in running.

    2.Yeah, I read adc1group1 conversion results in adc2Group0Interrupt() ISR, so adc1group1 ISR is not enabled.

  • 0 in reply to Fumin Li
    TI__Mastermind 20090 points

    Hello,

    Can you try looking at ADOPMODECR.24?  This bit affects how the ADC responds to debugging... Try setting bit 24 to 1 to see if the COS will cause the problem to go away. If so, you know that the errant results are due to the interaction with the debug environment rather than anything fundamental in your code/silicon.

    Regards,

    Forum Support

    see 15.11.2 ADC Operating Mode Control Register (ADOPMODECR) in spnu489c

  • 0 in reply to Fumin Li
    TI__Mastermind 22715 points

    Fumin,

    Bit 31 of the ADC FIFO register reflects the FIFO status for the data you read. This information will help you to debug why you read value 0x0 from the FIFO. I would also suggest setting up a FIFO threshold and using the FIFO threshold interrupt instead the conversion end interrupt. Using the FIFO threshold interrupt will ensure that all data in FIFO is valid when you read them.

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    TI__Intellectual 1235 points

    Hi Zhaohong,

        I am also looking at this case together with Fumin.

        I have a question regarding to the interrupt of threshold.

            If the ADC group is set in continuous operation mode, and the result read-out operation may be disturbed (by higher priority interrupts),

            Would there be chances that the threshold counter being decremented to value below 0? 

            If yes, the threshold interrupt may not be triggered unless the counter is wrapped back from -256.

            Is it correct?

    Best regards.

    Ma

  • 0 in reply to Renton Ma
    TI__Mastermind 22715 points

    Renton,

    Normally, the FIFO threshold is set half of the FIFO size. For example, you can set the FIFO threshold to 8 if the FIFO size is 16. In an application with multiple event, I do not recommend user to use long ISRs because it would block response to other events. The user need to do a detailed analysis about the response and processing time allowed for each event in the application so that they can be all addressed properly. I am attaching an example showing how to set up and use ADC in continuous mode. This example also shows how to use DMA to move data from ADC FIFO to system memory. Use of DMA will save a lot of CPU time.

    1351.ADC_Capacitor_Discharge.zip

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    TI__Intellectual 1235 points

    Dear Zhaohong,

        Thank you very much for your reply.

        I will help check the response time of each ISR in Fumin's system and revise.

        Reading the ADC result by DMA is surely a better solution.

    Best regards.

    Ma