Hello,
I am trying to test sending packets with the EMAC on the TMS570. It appears that I am doing everything correctly, but the TX FIFO never seems to actually send any frames. I am able to setup a descriptor, have it processed by the EMAC (owner bit goes low, EOQ goes high, TX0CP is set as I would expect). I am trying to send a 62 byte frame, and this happens fine for 3 times, and then it stops. My guess is that the TXFIFO (which has 3x 64-byte entries) is filling up and never transmitting. Once I submit the first frame the MACSTATUS IDLE bit goes low and never comes back, so presumably it is getting stuck trying to transmit. I also don't see any errors in MACSTATUS (I know it can generate errors, cause if I flub a desciptor on purpose I get an error in MACSTATUS and things don't lock up). I'm pretty stuck here, either I'm missing something incredibly obvious, or there is some magic bit I am missing somewhere. Some things that may be helpful:
1) I'm not using interrupts right now, so I don't enable them.
2) I'm just trying to transmit now, so the RX side is partially setup, but not enabled in RXCONTROL.
3) I have GMII set (I'm not sure exactly what this is, it really isn't explained in the TRM, but it says I should set it, I'm guessing its a global enable for the MII)?
4) I am using RMII to my PHY (it is happy and has a link).
5) I'm not using MDIO (I don't even turn it on) cause my PHY is strapped to be auto-everything.
6) My VCLK is set to HCLK/2 (80 MHz), VCLK4A is enabled, but set to VCLK (VCLK3 is also enabled). The TRM is pretty vague about what clock rate you need to set things to, I am trying to do 100 Mbps, so does VCLK4A have to be higher than 100 MHz?
Any help would be greatly appreciated, I'm pretty stumped as to why my frames are getting stuck in the TXFIFO (or at least seem to be). Thanks in advance for any help!
