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PD7 problem on the Stellaris EKS-LM4F232 EVA KIT REV A3

Harry Lam
Prodigy 40 points

Hi, I have some problem setting the PD7 as simple I/O pin. In my program, I need to use both PD6 and PD7 pins as output I/O pins.

With the same setting, I can output high or low at PD6 pin, not with PD7.

Here is how I set up both pins:

 

ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);

ROM_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_6);

ROM_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_7); 

 

Here is how I drive both pins:

set high

ROM_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_6, GPIO_PIN_6);
ROM_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_7, GPIO_PIN_7);

set low

ROM_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_6, 0);
ROM_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_7, 0);

Do I need to do some special setting for the PD7?

Thanks!!

  • Guru 47900 points

    So many GPIO - so few "very special" ones...  Your code - as you know - is correct for all, "normal" GPIO.  However - PD7 is a, "special case," requires "special treatment."  This from the, "Commit Control" section w/in the GPIO chapter of our 64 pin, M4F datasheet:  (your MCU behaves the same)

    "Protection is provided for the GPIO pins that can be used as the four JTAG/SWD pins (PC[3:0])and the NMI pin (PD7 and PF0).
     
    Writes to protected bits of the GPIO Alternate Function Select (GPIOAFSEL) register (see page 652), GPIO Pull Up Select (GPIOPUR) register (see page 658), GPIO Pull-Down Select (GPIOPDR) register (see page 660), and GPIO Digital Enable (GPIODEN) register (see page 663) are not committed to storage unless the GPIO Lock (GPIOLOCK) register (see page 665) has been unlocked and the appropriate bits of the GPIO Commit (GPIOCR) register (see page 666) have been set."

    Datasheet details, "how to," once the procedure is completed the code you've posted should be just fine...

  • in reply to cb1
    Prodigy 40 points

    Hi,

    That is very helpful, thanks. I will try that.

    If I want to use PD7 as UART2 Tx function, do I just need to do the same thing as you suggest and then do the following code?

     

    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);

    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);

    ROM_GPIOPinConfigure(GPIO_PD6_U2RX);

    ROM_GPIOPinConfigure(GPIO_PD7_U2TX);

    ROM_GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6 | GPIO_PIN_7);

    ROM_UARTConfigSetExpClk(UART2_BASE, ROM_SysCtlClockGet(), 115200,
                                (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                                 UART_CONFIG_PAR_NONE));

     

    Thanks,

    Harry

  • in reply to Harry Lam
    Guru 47900 points

    Code generally looks good - you've enabled both Uart & related Port, Pin-Typed, and "individually" Pin-Configured - this was no challenge for you - good job!

    There are some differences in the "unlock" value - based upon MCU and its "class."  Datasheet and one or more of the support .h files will define for you.  Good luck...

    Update: Forum "nicely" hides Subject - after posting saw that yours is new M4F (like ours) so here's from our datasheet.  (caution: ours is 4F231 - check your datasheet!)

    "Register 19: GPIO Lock (GPIOLOCK), offset 0x520
    The GPIOLOCK register enables write access to the GPIOCR register (see page 666). Writing 0x4C4F.434B (check yours!) to the GPIOLOCK register unlocks the GPIOCR register. Writing any other value to the GPIOLOCK register re-enables the locked state."

    paid political: (Your "click" of Verified Answer tab raises our Google rating - if you'd be so kind...)