How to generate Imprecise Abort for TMS570LS3137 device

Hello Pashan,

I am not sure what you are trying to do but in order to genreate an imprecise abort you can simply write to an illegal RAM address protected by the MPU.

Can you provide us more details?

Thanks and regards,

Luc

Hello Luc,

All I am trying to test is the function of IMPFASTS Rehister's ATYPE Bit.

I need to create a test code which generates ATYPE bit as 1 during ABORT.

I have an ABORT Handler Code. I am trying to test if it handles correctly all the bits within IMPFASTS Register by simulating some faults in the code.

Let me know.

Thank you.

Regards

Pashan

Hi Prashan,

Looking at code here I believe this code will work for you:

double *address;

// Writing to an area which is not implemented

address = (unsigned int *) 0x10002044;

*address = 0x1122334455667788;

Hello Luc,

The above code will generate PRECISE ABORT -- ATYPE bit of IMPFASTS as ZERO.

I need ATYPE bit of IMPFASTS Registers as ONE.

Please help.

Thank you.

Regards

Pashan

Pasham,

The IMPFAST register is not used for R4 based micro controller.

In your Data Abort handler, you have to check the 2 CPU registers in order to handle Imprecise Abort.

1] Data Fault Status Register
   To use the DFSR read or write CP15 with:
              MRC p15, #0, <Rd>, c5, c0, #0 ; Read Data Fault Status Register
              MCR p15, #0, <Rd>, c5, c0, #0 ; Write Data Fault Status Register

2] Data Fault Address Register
    To access the DFAR read or write CP15 with:
              MRC p15, #0, <Rd>, c6, c0, #0 ; Read Data Fault Address Register
              MCR p15, #0, <Rd>, c6, c0, #0 ; Write Data Fault Address Register

In order to generate an Imprecise Abort, the A bit in the CPSR has to be cleared. (The A bit is set automatically after reset. It disables imprecise Data Aborts).

Doing a write access in an non-implemented peripheral region will create an Imprecise Abort. This region has to be define has "DEVICE" memory.
By default, the Peripheral Region are defined has Strongly Ordered. So it is necessary to change the default region definition by the way of MPU.

If you are using Halcogen to generate your startup code, you have an API to set and enable the MPU. (_mpuInit_())
You have to call at some point in your code the _mpuInit_().

For more information on Imprecise Abort, please refer to the Cortex R4 TRM. (4.2.18 Fault Status and Address Registers)

Please let me know if I've answered your question.

Regards,

Jean-Marc

Pashan,

I want to add one more comments. In my previous message, I've mentioned that the A bit in the CPSR has to be cleared.
Here is the assembly sequence to do so.

 MRS <Rd>, CPSR                    ; Read CPSR
 BIC <Rd>, <Rd>, #0x100        ; Clear Bit 8
 MSR CPSR_X, <Rd>               ; Write CPSR

This syntax is for TI Code Generation Tools.

Regards,

Jean-Marc

Pashan,

The part number you mentioned is a custom part and I can't answer any question related to this device on this public forum.

Please contact your sales representative.

I will delete your last question from this thread.

Regards,

Jean-Marc