Hi
I am using stellaris M4F GP timer0. I leverage stellarisWare functions. The stellariWare function TimerConfigure (unsigned long ulBase, unsigned long ulConfig) threw a Fault in this line:
HWREG(ulBase + TIMER_O_CTL) &= ~(TIMER_CTL_TAEN | TIMER_CTL_TBEN);
stepping into Assembly shows that "LDR R2, [R0] " created the error.
276 HWREG(ulBase + TIMER_O_CTL) &= ~(TIMER_CTL_TAEN | TIMER_CTL_TBEN);
00003154: 9800 LDR R0, [SP]
00003156: 4992 LDR R1, $C$CON3
00003158: 300C ADD R0, #0xC
0000315a: 6802 LDR R2, [R0] <---------------- failed
0000315c: 4011 AND R1, R2
0000315e: 6001 STR R1, [R0]
The MMADDR show that the memory management fault happens in address 0x40030000 which is the timer control register (ulBase + TIMER_O_CTL). Did I do anything wrong to this timer? Did I miss any steps? I tried two boards with the same error. I copied the timer config function directly from stellaris sample code.
Thanks...
Eric
