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IOMM Error Enable Status Register Configuarion

My  technical reference is the "TMS570LS31x/21x 16/32-Bit RISC Flash Microcontroller" manual.

I am in the process of trying to validate my implementation of the I/O Multiplexing and Control Module (IOMM) error handling. According to section 4.4.3 of the technical referenece an Address Error (occurs when there is a read or a write access to an un-implemented memory location) within the IOMM should generate an error signal that is mapped to the Error Signaling Module. 

However, after executing some special code that generates an address error I notice that the "FAULT_STATUS_REG" changes to 0x000000A0. This confirmed that the error is being detected, but the associated ESM Status Register pin is not being asserted.  After some debugging I realized that the write to the "ERR_ENABLE_REG" during my initialization routine was not modifying the register values. Here is a snippet of my code to initialize the Error Status Handling:

IOMM_Init(void){

   IOMMREG->ERR_ENABLE_REG= 0x00000003; /* Enable Address and Protection Error Signaling */

   ESMREGS->EPENACLR4 = 0x00000020; /* Disable the automatic nError Pin response */

   ESMREGS->INTENASET4 = 0x00000020; /* Enable IOMM - Mux Config Error ESM Interrupts (Map to ESML) */

   ESMREGS->INTLVLCLR4 = 0x00000020;  /* Map to ESML */

 

I have two questions:

1) Any thoughts as to why the value of the Error Enable Register is still 0x00000000 after executing my init routine?

2) Is the Error Enable Register they only setting that would prevent the IOMM Address Error from generating an error signal within the ESM? 

  • Lonnie,

    I am attaching 2 CCS3.3 projects testing IOMM error. You can use them as the reference.

    5282.iomm_error.zip

    Thanks and regards,

    Zhaohong

  • Zhaohong,

    Thanks for your response. I realized that the issue was with the configuring of the Error Enable Register. Apparently there is an undocumented "feature" regarding the locking mechanism of this register. The reference manual states that only the PINMMRs are protected from writes when locked, but it appears all IOMM registers are protected. I added the unlocking and locking around my Error Enable Register configuration in my Init function and now it works.

    Thanks again.

    Lonnie