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DCAN Initialisation Corrupted in DCANTIOC/DCANRIOC on write to DCANCTL

Tony Morrell
Genius 4130 points

Hi,

I have a problem with DCAN module initialisation. In the following code snippet I set DCAN initialisation mode by write to DCANCTL with CCE = Init = 1. I then configure both Tx and Rx by write to DCANTIOC and DCANRIOC. I then exit initialisation mode by writing to DCANCTL again with CCE = Init = 0.

My problem is that the final write to DCANCTL affects the values within DCANTIOC and DCANRIOC, setting them to 0x0000000F and 0x00000009 respectively (regardless of whatever value they previously held).

(regDcan[DCAN_MODULE_2_E]).DCANCTL  = 0x00000041UL;  /* CAN Control Register (DCANCTL) Set to initialisation mode */

(regDcan[DCAN_MODULE_2_E]).DCANES;                  /* Error and Status Register (reset on read) */
(regDcan[DCAN_MODULE_2_E]).DCANTIOC = 0x00000000UL; /* CAN TX IO Control Register */
(regDcan[DCAN_MODULE_2_E]).DCANRIOC = 0x00000000UL; /* CAN RX IO Control Register */
(regDcan[DCAN_MODULE_2_E]).DCANCTL  = 0x00000000UL; /* CAN Control Register (DCANCTL) clearing, Leave configuration and initialisation mode */

Any thoughts?

Regards, Tony.

  • 0
    TI__Mastermind 22715 points

    Tony,

    I am attaching a DCAN initialization function. You may use it a a reference.

    0882.dcan_cfg_eabi.c

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    Genius 4130 points

    Hi Zhaohong,

    Thanks for the example coding. This illustrates that DCANCTL CCE and Init control is not required for write to DCANTIOC and DCANRIOC. I had thought from the TRM that use of CCE is required for write access to all configuration registers, which I had considered DCANTIOC and DCANRIOC to be.

    So, my questions now are:

    1. Should use of CCE/Init only be used during CAN bit-timing configuration?
    2. Is it expected that other CAN configuration registers would be 'corrupted/modified' by setting them within CCE/Init enable/disable (as DCANTIOC and DCANRIOC are in my code snippet)? Note that I have also demonstrated to myself that setting DCANTIOC/DCANRIOC and then performing CCE/Init enable/disable causes similar corruption of these registers; I must set them after any CCE/Init enable/disable.

    Regards, Tony

  • 0 in reply to Tony Morrell
    TI__Mastermind 22715 points

    Tony,

    In the TRM, there is a special note at the end of description of the DCANBTR register: "This register is only writable if CCE and Init bits in the CAN Control Register are set.". The definition of CCE bit needs clarification in TRM.

    In the description of DCANTIOC and DCANRIOC registers, you will find that some bit are forced to 1 or 0 after the Init bit of CAN control register is reset. Does it match with your observation?

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    Genius 4130 points

    Hi Zhaohong,

    The forcing of bits I see does not quite match the description in the TRM. For DCANTIOC I do get forcing as described, particularly 'Func' and 'Dir' are forced to '1'. However, for DCANRIOC the forcing is slightly different, the TRM describes both 'Func' and 'Dir' as being forced to '1', whereas in my evaluation I get 'Func' forced to '1' but 'Dir' forced to '0' (i.e. CAN_RX pin is an input). This dies seem logival given that this is register DCANRIOC, maybe this is a documentation error and it should actually say that 'Dir' is forced to '0'!

    There remains a confusion in the TRM documentation then for both DCANTIOC and DCANRIOC. Each of these sections state in a note that 'The values of the IO Control registers are writable only if Init bit of CAN Control Register is set'. How would it then be possible to set 'OD', 'Func' and 'Dir' bits within the initialisation (i.e. after 'Init' set) if they are forced to other values on exit from initialisation (i.e. 'Init' reset)?

    Again, I think this may be a documentation error. I can quite happily modify DCANTIOC and DCANRIOC outside of initialisation ('Init' not set), as was in fact demonstrated in the sample code you sent me.

    This problem looks to me as being deficient, ambiguous and even incorrect documentation. What do you think?

    Regards, Tony.

  • 0 in reply to Tony Morrell
    Genius 4130 points

    Hi Zhaohong,

    Any final thoughts?

    Regards, Tony.

  • 0 in reply to Tony Morrell
    TI__Mastermind 22715 points

    Tony,

    Thanks for pointing out those documentation error for us. I have notified the TI engineer who is responsible for DCAN section of the TRM for the following three errors.

    (1)    The function of CCE bit needs to be clarified. Only configuration of DCAN BTR register requires CCE bit. The existing description give the impression of CCE bit needs to be set for all configuration registers.

    (2)    The DIR bit if DCAN RIOC register should be forced to “0” after “init” reset. The current description says that it is force to “1”.

    (3)    The statement “The values of the IO Control registers are only writable if Init bit of CAN Control Register is set.” for DCAN TIOC and RIOC registers is not correct.  They are writable when “init” bit is clear.

    Please let me know if you need any additional information.

    Thanks and regards,

    Zhaohong