Hello Support,
With DCAN Parity Enabled [PMD=0x0A], I was assuming DCAN Parity RAM area can be initialized either by
1> using MSINENA [Hardware Based Auto Init]
or
2> by using Direct Write using IFxCMD Register to every rows of Message RAM Objects.
For the second case above, I see that PER bit of DCANCTL Register is set. Which indicates that during IFxCMD based WRITE, parity area is not written even though PMD field is set to 0x0A. This is observed only for case when MSINENA based initialization is not performed.
Any clue about why I can't initialize all the MESSAGE RAM Area only by using direct write with IFxCMD Register?
Thank you.
Regards
Pashan