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RM48 SPI modifying CS in functional mode

Dejan Pojbic
Intellectual 480 points

Hello,

I have a problem. I want to use CS as a SPI functional pin. I know i can use it as GIO pin but i dont wont to.

I have some special things in communication between master and slave. I using 5-pin choice.

Protocol goes something like so:

I select slave 0, than i send 8 bytes of data and than again send 8 bytes data. After this i want to CS goes up. CARLENG is 1 byte.

When i send 8 + 7 bytes i use CS_HOLD = 1, and at the last byte i set CS_HOLD = 0.

But if something goes wrong,  flag goes up (like timeout), function exits, CS stay down.

How can i modified CS signal without sending a fake command to Slave?

I always addressing the same Slave.

Thx. 

  • 0
    TI__Mastermind 22375 points

    Dejan,

    Thanks for using our forum.

    To answer your question, I need additional information.

    Which device are you using?

    Are you using a standard SPI module, or MIBSPI module.

  • 0 in reply to Jean-Marc Mifsud
    Intellectual 480 points

    Im using standard SPI modul (SPI2 on hercules development kit rm48 MCU), device is xRM48 L950AZWIT. 

  • 0 in reply to Dejan Pojbic
    TI__Mastermind 22375 points

    Dejan,

    The standard SPI allows you to control the CS by setting the CSHOLD bit to 1.
    In this mode, the SPIDAT1 has to be used instead of SPIDAT0.

    The first access will be a 32bit write to SPIDAT1 to set the CSHOLD bit to 1, specify the CS to use and the data format and of course your up to 16 bits data to be transfered.
    The next access, in your case,  can be a 8 bits data for the next data to transfer. SPIDAT0 or SPIDAT1 can be use. If SPIDAT1 is use, only the DATA field has to be written. (bit 15 down to 0).
    Same for all other data to be transfered.
    For the last data, another 32 bits write to SPIDAT1 has to be done, this time with the CSHOLD =0.
    At the end of this last transfer, the selected CS will be de-asserted. (back to 1)

    Please let me know if this is working for you.

  • 0 in reply to Jean-Marc Mifsud
    Intellectual 480 points

    That should work, but like i sad before. I dont want to send new data to slave when error happens.

    I just want CS to de-asserted.

    If i had CS as GIO pin, i will simple de-asserted that pin. 

  • 0 in reply to Dejan Pojbic
    TI__Mastermind 22375 points

    Dejan,

    You don't have to send a new data to release the CS.

    For the last data you want to send, while CS is low, use the SPIDAT1 register, and at the same time you write your data, clear the CSHOLD bit.
    This data is send out with CS low and at the end of this transfer CS will be high.

    Here is a quick example:

        uint32_t TX_BUFFER[] = {0x10000000, 0x10000011, 0x10000022, 0x10000033, 0x10000044, 0x10000055, 0x10000066, 0x00000077};
        uint32_t i,counter[10];
        volatile uint32_t SpiBuf[10];
        spiInit();

        for (i=0;i<8;i++)
        {
         spiREG4->DAT0 = TX_BUFFER[i];
         while((spiREG4->FLG & 0x00000100) != 0x00000100)
         {
             counter[i]++;
         }
         SpiBuf[i] = spiREG4->BUF;
        }

    The first 7 data have the bit CSHOLD=1, and for the last one CSHOLD=0

    Please let me know if this will work for you.

    NOTE: After sending the first data using SPIDATA1 it is possible to use for the other data SPIDATA0 and only write 8 bits.
    For the last data, it is necessary to use SPIDATA1 and to clear the CSHOLD bit.