Other Parts Discussed in Thread: HALCOGEN
I made a new RM48 project using Halcogen 3.02.02, for IAR tools. I did not add any user code to the auto-generated source files. I tried to compile the resulting source code using IAR EWARM 6.40. The build process generates 4 compile errors and 14 warnings.
The 4 errors are:
Error[Og006]: Syntax error in inline assembly: "Error[401]: Operand syntax error" C:\...\source\sys_startup.c 277
Error[Og006]: Syntax error in inline assembly: "Error[401]: Operand syntax error" C:\...\source\sys_startup.c 279
Error[Og006]: Syntax error in inline assembly: "Error[401]: Operand syntax error" C:\...\source\sys_startup.c 292
Error[Og006]: Syntax error in inline assembly: "Error[401]: Operand syntax error" C:\...\source\sys_startup.c 294
These are inline assembler instructions "mrc" and "mcr". Unfortunately I don't know assembly so I can't tell what's wrong.
Moving on to the warnings, all except one are "Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement" in "crc.c" lines 221, 224, in "esm.c" lines 519, 544, in "rti.c" line 329, in "sys_selftest.c" ln 305, 551, 607, in "sys_startup.c" ln 436, 440, 555, 559 and system.c ln 211.
Finally the last warning is an implicit float to int conversion in "i2c.c" module, line 170, in i2cSetBaudrate(): ck = ((vclk)/(2*baud*1000*(prescale+1)))-d;
I'll try to comment out the inline assembler sections that produce errors in "sys_startup.c", but I'm not sure what I'll be missing by not having those workarounds for erratas Cortex R4-66 and 57.
