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TMS570 HTU transfer from NHET to main memory stopped after 1, 2 ou 3 transfers

Chuck Wong
Genius 3950 points

Hi there,

I configured my HTU setup to transfer from NHET --> main memory, with frame=16 and element=1, then issue an interrupt to the CPU. However, the behavior is inconsistent and the interrupt to the CPU was never generated.

When stop the execution in the debugger, depend on the run, only 1, 2 or 3 - 64-bit transfer(s) have been completed (never reached 16: no interrupt to CPU), despite the input (edge detection) was fed consistently to satisfy tranfer condition (edge detection). The transferred values are apparently correct, with the WCAP instruction Control Field and Data Field in the assigned buffer.

The register HTUACPE has ERRETC=0x01 and ERRF=1, but I can't really interpret this "Error Element Transfer Counter".

Can someone please shed some light?

Thank you very much!

 

My initialization code for the HTU is as follow:

 

HTUDCP0IHADDRCT_bit.DIR     = 0;    
HTUDCP0IHADDRCT_bit.SIZE    = 1;    
HTUDCP0IHADDRCT_bit.ADDMH   = 0;    
HTUDCP0IHADDRCT_bit.ADDMF   = 0;    
HTUDCP0IHADDRCT_bit.TMBA    = 3;    
HTUDCP0IHADDRCT_bit.TMBB    = 3;    
HTUDCP0IHADDRCT_bit.IHADDR  = 20;
HTUDCP0ITCOUNT_bit.IETCOUNT = 1;    
HTUDCP0ITCOUNT_bit.IFTCOUNT = 16;
HTUDCP0IFADDRA = (unsigned int) buffer[0];    
HTUDCP0IFADDRB = (unsigned int) buffer[1];
HTUBFINTS   = 0x00000003;    
HTUCPENA    = 0x00000001;    
HTUINTMAP   = 0x00010000;    
HTUINTMAP   = 0x00000000;
HTUGC_bit.HTUEN = 1;

 

 

  • 0
    Genius 3950 points

    Additional info:

    The VCLK2 (NHET) is 64 MHz, while VCLK (HTU) is only 8 MHz.

    HR=1 or 15.625 ns, LR=4 or 62.5 ns.

    The signal to be captured is 1 Mhz with a duty cycle never below 2xLR. The worst case duty cycle (stay high or stay low) is 50% or a minimum duration of 500 ns.

    Could this be a problem?

     

  • 0 in reply to Chuck Wong
    TI__Intellectual 1480 points

    chuck thanks for your post our SME will get back to you

    Hecules forum support

  • 0 in reply to Hari Pendurty
    Genius 3950 points

    I think that I've answered my own question.

    After changing the HTU feeding frequency from 8 MHz to 64 MHz, the transfer stopping behavior has disappeared.

    I don't know where in the Reference Manual this restriction was stated, though.

    Thanks you!

     

    Edited: Maybe because the 1 MHz input signal rate is too greate for the 8 MHz HTU to handle, which could result in data overflow. Can anyone confirm this?