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In System Programming for RM48 circuit design and programming question.

Dmitry Ponomarev
Prodigy 140 points
Other Parts Discussed in Thread: RM48L950

Good afternoon,

I am working on a project requiring simple IO functionality of the RM48 MCU,

Looking at page 7 of the following schematic, I found for the Texas Instruments RM48 MCU, It seems like the only connections I need to connect with JTAG are the ones circled in blue (also + nRST), is this correct?

http://processors.wiki.ti.com/images/f/f7/RM48_HDK_Schematics_revE.pdf

 
I also found that a standard Jtag header has 20 pins, (from http://www.ti.com/lit/ug/spnu508a/spnu508a.pdf page 10, table 2-2), is this also correct? It seems like a lot of pins are wasted on GND.

Lastly, I understand that JTAG is only a protocol used to change data in user registers of the device. How is In System Programming performed on RM48? I don't need a detailed explanation, I just want to know if it's built into  TI Code Composer Studio.

Luckily, the Jtag header is included in the RM48 HDK, which I am planning to purchase.

I am also planning to purchase XDS510 USB PLUS JTAG Emulator with 14 pin Target Adapter Cable and use the included 20 pin adapter cable.

Is this combination correct for programming the RM48 HDK device?

Is there a getting started step by step tutorial for programming with CCS?

EDIT: Bonus Question:


http://www.ti.com/lit/ug/spnu503/spnu503.pdf  datasheet states on page 1110 that "The GIO module supports two ports GIOA and GIOB, each port has 8 I/O pins)

This means there are only 16 GPIO pins on the device! Whereas the description for the RM4x MCU states that there are 44, maybe more with different packages. Did I misunderstand the datasheet? I need a minimum of 40 GPIO, can someone verify that I will have access to this many pins with the RM48L950 MCU?

EDIT2:

I found by searching the RM48L950 datasheet that several modules can be used as GPIO pins. For instance, the DMM module can be used as 16 additional GPIO pins, and RTM has 4. However, looking at the datasheet for the RM48L950 144pin QFP package, I cannot find any of these pins, they are only present in the BGA package.

Does this mean that the 144 pin TQFP device only has 16, not 44 GPIO?

If not, if some of the other modules can be used as GPIO, do they all need to be configured, when using CCS, as GPIO, or do they start initially as GPIO? Can they be used in the same way as other GIO pins? Can anyone provide some example code or point me in the correct direction for what I would need to do in order to use all these other modules as GPIO?

Thank you very much for your help,

-Dmitry

  • 0
    TI__Guru**** 196306 points

    Hi Dmitry，

    I could not connect the link you gave us: http://processors.wiki.ti.com/images/f/f7/RM48_HDK_Schematics_revE.pdf

    The JTAG header on HDK is the standard 20pin ARM JTAG header. You can use either build-in emulator (xds100v2) and external emulator plugged onto 20pin JTAG header to program the microcontroller. TI CCS4.x/CCS5.x support this MCU devices and a lot of emulators (XDS100V2, Spectrum Digital XDS510USB, Spectrum Digital XDS510USB Plus,etc). 14pin to 20pin adaptor will work fine.

    Please get the CCS quick start or tutorial from: http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5

    On RM48 device, most of the signal pins can be configured as GIO. For example, you can use SPI  pins as GIO by writing correct value to PCFUN register:

    /* SPI1 set all pins to GPIO */
    spiREG1->PCFUN = 0 /* SCS[0] */
                                      | (0 << 1) /* SCS[1] */
                                      | (0 << 2) /* SCS[2] */
                                      | (0 << 3) /* SCS[3] */
                                      | (0 << 8) /* ENA */
                                      | (0 << 9) /* CLK */
                                      | (0 << 10) /* SIMO */
                                      | (0 << 11); /* SOMI */

    Regards,

    QJ

  • 0 in reply to QJ Wang
    Expert 1620 points

    Hi QJ,

    I want program my custom PCB with a RM48l952pge MCU by a Blackhawk USB100v2 JTAG emulator(USB100V2-ARM). I got a problem (see: http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/274705/970142.aspx#970142 )

    Because I guess the MCU of last PCB may be damaged. So I got new chips and built a new Custom PCB.

    When I run the button  'TEST CONNECTION' .I got the report showed below:

    [Start]

     Execute the command:

     %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

     [Result]

     -----[Print the board config pathname(s)]------------------------------------

     C:\Users\dwang\AppData\Local\.TI\4040591894\

        0\0\BrdDat\testBoard.dat

     -----[Print the reset-command software log-file]-----------------------------

     This utility has selected a 100- or 510-class product.

    This utility will load the adapter 'jioserdesusb.dll'.

    The library build date was 'Apr  1 2013'.

    The library build time was '23:55:08'.

    The library package version is '5.1.73.0'.

    The library component version is '35.34.40.0'.

    The controller does not use a programmable FPGA.

    The controller has a version number of '4' (0x00000004).

    The controller has an insertion length of '0' (0x00000000).

    This utility will attempt to reset the controller.

    This utility has successfully reset the controller.

     -----[Print the reset-command hardware log-file]-----------------------------

     The scan-path will be reset by toggling the JTAG TRST signal.

    The controller is the FTDI FT2232 with USB interface.

    The link from controller to target is direct (without cable).

    The software is configured for FTDI FT2232 features.

    The controller cannot monitor the value on the EMU[0] pin.

    The controller cannot monitor the value on the EMU[1] pin.

    The controller cannot control the timing on output pins.

    The controller cannot control the timing on input pins.

    The scan-path link-delay has been set to exactly '0' (0x0000).

     

    -----[The log-file for the JTAG TCLK output generated from the PLL]----------

     

    There is no hardware for programming the JTAG TCLK frequency.

     

    -----[Measure the source and frequency of the final JTAG TCLKR input]--------

     

    There is no hardware for measuring the JTAG TCLK frequency.

     

    -----[Perform the standard path-length test on the JTAG IR and DR]-----------

     

    This path-length test uses blocks of 512 32-bit words.

     

    The test for the JTAG IR instruction path-length failed.

    The JTAG IR instruction scan-path is stuck-at-zero.

     

    The test for the JTAG DR bypass path-length failed.

    The JTAG DR bypass scan-path is stuck-at-zero.

     

    -----[Perform the Integrity scan-test on the JTAG IR]------------------------

     

    This test will use blocks of 512 32-bit words.

    This test will be applied just once.

     

    Do a test using 0xFFFFFFFF.

    Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    The details of the first 8 errors have been provided.

    The utility will now report only the count of failed tests.

    Scan tests: 1, skipped: 0, failed: 1

    Do a test using 0x00000000.

    Scan tests: 2, skipped: 0, failed: 1

    Do a test using 0xFE03E0E2.

    Scan tests: 3, skipped: 0, failed: 2

    Do a test using 0x01FC1F1D.

    Scan tests: 4, skipped: 0, failed: 3

    Do a test using 0x5533CCAA.

    Scan tests: 5, skipped: 0, failed: 4

    Do a test using 0xAACC3355.

    Scan tests: 6, skipped: 0, failed: 5

    Some of the values were corrupted - 83.3 percent.

     

    The JTAG IR Integrity scan-test has failed.

     

    -----[Perform the Integrity scan-test on the JTAG DR]------------------------

     

    This test will use blocks of 512 32-bit words.

    This test will be applied just once.

     

    Do a test using 0xFFFFFFFF.

    Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.

    The details of the first 8 errors have been provided.

    The utility will now report only the count of failed tests.

    Scan tests: 1, skipped: 0, failed: 1

    Do a test using 0x00000000.

    Scan tests: 2, skipped: 0, failed: 1

    Do a test using 0xFE03E0E2.

    Scan tests: 3, skipped: 0, failed: 2

    Do a test using 0x01FC1F1D.

    Scan tests: 4, skipped: 0, failed: 3

    Do a test using 0x5533CCAA.

    Scan tests: 5, skipped: 0, failed: 4

    Do a test using 0xAACC3355.

    Scan tests: 6, skipped: 0, failed: 5

    Some of the values were corrupted - 83.3 percent.

     

    The JTAG DR Integrity scan-test has failed.

     

    [End]

     

    When I run the button ' DEBUG AS ---> Code composer debug session'  . It completed the flash erasing and then  I got the report showed below:

     

    Error connecting to the target: (Error -2131 @ 0x0) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)

     

    Would you help me analyze the problem.

    Thanks,

     

    Chuan