about RM48L950 I2C modul in interrupt mode2

dison wang

Hi,

I make I2C modul work in Interrupt mode.

When I want to read data from slave device, I have to sent a slave adress with read bit =1 frist. After this byte is sent, the I2C modul will enter master reciver mode.

Q1: Whether the program will enter ISR of TX after this byte was sent , or the program do not enter ISR of TX because I2C modul have entered the master reciver mode.( TX ,RX both interrupt enable).

Q2: Should I set the I2C modul to master ( MDR:MST=1) after every stop condition if I want keep I2C modul in master mode?(I just want confirm this.). If the answer is "YES", is there any way to keep modul in master without set MST again and again.

Thanks!

B.Rs,

Chuan

over 13 years ago

0 Zhaohong Zhang over 13 years ago

TI__Mastermind 22715 points

Chuan,

Please check this thread.

http://e2e.ti.com/support/microcontrollers/hercules/f/766/t/218030.aspx

Thanks and regards,

Zhaohong

0 dison wang over 13 years ago in reply to Zhaohong Zhang

Expert 1620 points

Hi Zhaohong,

Thanks for your help.

I do not know the answer about question 1 yet.

I know after I send a slave address with read flag, the modul will enter to master reciver mode from master transmitter mode and the modul will trigger RX ISR when it recive data.

My question is after I send the slave address for read device, the TX ISR will be triggered or not.

Thanks!

B.Rs,

Chuan

0 Zhaohong Zhang over 13 years ago in reply to dison wang

TI__Mastermind 22715 points

Chuan,

There will be no TX interrupt after the slave address and read/write mode is sent. The master will generate a no-acknowledge interrupt if there is no acknowledgement from slave.

Thanks and regards,

Zhaohong

0 dison wang over 13 years ago in reply to Zhaohong Zhang

Expert 1620 points

Hi Zhaohong,

Thanks!

Your means is if I send a slave address for reading device, it will be no Tx interrupt, although the TX interrupt is enable. The reason is I2C modul have stayed in Master reciver mode. Is it right?

I think if I send a slave address for writing device, it will generate a TX interrupt after the address byte is sent. Is it right?

In addition, Would you tell me where you found these detail.

Thank you very much!

B.Rs,

Chuan

0 Zhaohong Zhang over 13 years ago in reply to dison wang

TI__Mastermind 22715 points

Chuan,

According to the spec, the TX interrupt is only "Generated when the transmitted data has been copied from the data transmit register (I2CDXR) into the transmit-shift register (I2CXSR). The TXRDY bit can also be polled by the device to determine when to write the next data into I2CDXR." There is no such transaction in master receive mode.

Thanks and regards,

Zhaohong

0 dison wang over 13 years ago in reply to Zhaohong Zhang

Expert 1620 points

Hi, Zhaohong,

Thanks!

B.Rs,

Chuan

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about RM48L950 I2C modul in interrupt mode2