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pin out mapping on M4F



Hello,

Are they a tool that help us to see what pinout can be implemented using the stellaris familly

eg: when using a M4 or /3 in RMII mode, can the other pin that are not used (on the MII), be used as I/O ?

bests regards

Lionel

 

 

  • Lionel,

    I believe you will find the Stellaris PinMux Utility very useful.  it is a graphic utility for the Stellaris LM4F devices for pin configuration.  It will tell you if there are pin configuration conflicts as well as help you know what pins are needed for particular peripherals available on your device.  The data sheet is also always a useful tool regarding the part's pinout.

    -Rebecca

  • @Rebecca,

    PinMux Utility certainly assists - thanks for that. 

    Do you know if the PF0 & PD7 "NMI defaults/safeguards" have made it yet into latest versions of PinMux?  (I've helped several already who've stumbled w/this...)

  • cb1,

    Are you suggesting there should be a pop-up warning for the NMI pin configuration, like for JTAG?  There is a pop-up warning for the JTAG pin configurations because if another pin configuration is chosen, the user will not be able to communicate with the device via JTAG.  The accidental NMI pin configuration does not have as detrimental of an effect. 

    -Rebecca

  • @Rebecca,

    I wasn't smart enough to think of that "pop-up" style warning - but it does sound, "Good for Gov't Work!"  

    And surely beats the (pardon) too brief and seemingly ineffectual treatment w/in the 1400+ page MCU Datasheet.  (I must have single-handedly "guided" at least 10 posters to safe harbor - all having missed this M4F NMI default)

    Confused as to the wording, "accidental NMI pin configuration" - my sense is that the pins default to NMI - and cannot be, "Re-Purposed" accidentally! 

    Classic issue for so many new M4F users (which included me - last Oct/Nov) is the, "failure to recognize" that PF0/PD7 "require" special treatment prior to normal/customary GPIO use!  (while their adjacent pin brethren place, "no such" demands.) 

    I would add the, "pop-up" - just as you suggest - and place even more bold-faced, "PF0/PD7 alerts" - throughout the MCU datasheets.  (especially at the very start of the GPIO Section - and woven several more times there as well)

    In another life - firm/I produced a product which required similar, "special treatment" - and no one read our 300+ pg manual either.  Our "cure" was a, "fortune-cookie-like" paper strip - tacked to each/every pcb.  Smart clients "taped" that advisory "fortune" to their monitors - my help-desk issues dropped quickly - and substantially...

    As good as your, "Pop-Up" treatment sounds - I'd include that same bold-faced PF0/PD7 advisory - at the start and several times more w/in this new Pin Select tool...

    And - if "style guide" allows - I'd "uniquely color code" both the JTAG/SWD and the NMI pins.  Now you've provided more than "reasonable" warning to your users...

  • Very nicely put.  For my preference ( and not having to load my predefined pinmux file each time, when i change devices I am working on ) have it load WITH the JTag set to JTag so those pins are " in use " as an option.  OK, so I only have 3 that I load and play with.  It still would be a wonderful option to compliment the popup idea.

  • Your idea is nicely put - as well.

    Best yet - I think - is to gray out or color code each/every JTAG/SWD and NMI pin so that user is maximally AWARE - something "special" is involved here...  i.e. Proceed with Caution - or RTFM (at least GPIO)...