Hello, does any one
1. know what is the ADC continues sampling rate I can get to with
TMDXRM46CNCD when i am interested in is to convert single channel
2. Does it have the uIP stack example ?
Thanks,
Ilya
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Hello, does any one
1. know what is the ADC continues sampling rate I can get to with
2. Does it have the uIP stack example ?
Thanks,
Ilya
Hello Ilya,
The sampling rate depends on the clock speeds: ADCCLK and VCLK. Time per sample: 200nS+12*t(ADCCLK)+6*t(VCLK) should give you the sampling rate.
Best regards,
TI Hercules Forum Support
Ilya Peysakhov said:Hello, does any one
1. know what is the ADC continues sampling rate I can get to with
TMDXRM46CNCD when i am interested in is to convert single channel
2. Does it have the uIP stack example ?
HW: http://processors.wiki.ti.com/index.php/RM46_CNCD, search LwIP. uIP is included in the LwIP.
Thanks,
Ilya
Hello,
so actually I will be able to stay under 500nsec?
(plan to route all the sampling channels to one input and continuesly sample it)
Thanks,
Ilya
Hello Ilya,
Even with fastest ADCCLK at 30MHz, the total time would not be under 500nS.
At ADCCLK = 30Mhz and VCLK = 100Mhz, you need atleast 656nS.
Regards,
TI Hercules Forum Support
Thanks!
One more question please: what is the difference between the TMDXRM48CNCD and TMDXRM48CNCD there is no image for the first one, are the phisical dimentions the same?
BR,
Ilya
http://processors.wiki.ti.com/index.php/RM48_CNCD is the RM48 control card link.
The LwIP project is compatiable for both.