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Which VIM Channel is connected to DMAMPCTRL INTxENA bits?

Pashan None
Genius 5660 points

Other Parts Discussed in Thread: TMS570LS3137

Hello Support,

In DMAMPCTRL register, there are 4 INTxENA bits.

For TMS570LS3137 device, which VIM Channel is connected for those INTxENA bits?

Or, is it ESM Group 1 MPU Fault?

Please help.

Thank you.

Regards

Pashan

 

  • 0
    TI__Guru 59540 points

    These interrupts are related specifically to the MPU feature. The interrupt lines are routed to the ESM Group 1 MPU fault as you have noted and an interrupt can be associated with this fault if configured in the ESM. They are not routed to the VIM. Also note that the option to select between VIM and second CPU is valid only when the device has dual asynchronous CPUs. The LS3137 has dual synchrounous CPUs so there is no option to rout to a second CPU.

  • 0 in reply to Chuck Davenport
    Genius 5660 points

    Hello Chuck,

    Does INTxENA bit means DMA MPU ENABLE for that particular channel?

    I couldn't find any other bit with which I can disable DMA MPU feature if I don't need DMA MPU feature in my code.

    Please let me know all th effects INTxENA bit will control.

    I am assuming when INTxENA bit is ZERO, then DMA MPU doesn't check for any memory protection violation.

    If that is TRUE, then a better name for that bit should be DMA_MPUxENA instead of INTxENA.

    That's what I am thinking only as I don't understand full connection between INTxENA and DMA MPU.

    Please elaborate somewhat more about actual internal connection mechanism for INTxENA bits within DMAMPCTRL Register.

    Thank you.

    Regards

    Pashan

     

  • 0 in reply to Pashan None
    TI__Guru 59540 points

    Hello Pashan,

    The INTxENA bits will enable or disable the interrupt for an MPU access violation for the specific MPU region. The REGxENA bit will enable or disable the region so that accesses are checked or not.