This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LS3x FlexRay Loopback

Hello,

i am just working on a little FlexRay project and I want to use it in loop back mode. By now I was not able to get my TMS570LS3137HDK in run in loop back mode. I use CCSv5.2.100018 IDE.

the following code shows my initialisation:

int node_all_init(FRAY_ST*Fray_PST)

{

/***** Configure all the necessary registers *****/

configure_all_registers(FRAY1);

/***** Configure the buffers *****/

configure_all_buffers(FRAY1);

/******** Enter CONFIG POC State ********/

if(config_chi_cmd(CMD_CONFIG, FRAY1)) return 1;

//enter loop back

FRAY1->LCK_UN.LCK_ST.tmk_B8 = 0x75;

FRAY1->LCK_UN.LCK_ST.tmk_B8 = 0x8A;

FRAY1->TEST1_UN.TEST1_ST.wrten_B1 = 0x1; //write enable

//config_chi_cmd(CMD_LOOPBACK, FRAY1);

FRAY1->SUCC1_UN.SUCC1_ST.cmd_B4 = 0xF; //CMD(3-0) = 0xF > Loopback mode

while (FRAY1->SUCC1_UN.SUCC1_ST.pbsy_B1 != 0x0 ); // wait until command is executed

FRAY1->TEST1_UN.TEST1_ST.elbe_B1 = 0; //internal loopback

// write key to leave CONFIG POC state/

config_unlock_key(FRAY1);

/******** Enter READY POC State ********/

if(config_chi_cmd(CMD_READY, FRAY1)) return 1;

/******** Enter ALLOW_COLDSTART POC State ********/

if(config_chi_cmd(CMD_ALLOW_COLDSTART, FRAY1)) return 1;

/******** Enter RUN POC State ********/

if(config_chi_cmd(CMD_RUN, FRAY1)) return 1;

return 0;

}

Thanks

Christian

  • Christian,

    Please take a look at this flexray example for Hdk.

    http://processors.wiki.ti.com/index.php/TMS570LS31x_HDK_Kit#Example_Programs

    Thanks and regards,

    Zhaohong

  • Christian,

    The following works for me to enter async transfer mode. Since ATM and loopback are both test modes, the same may apply to loopback.

        test1=Fray_PST->TEST1_UN.TEST1_UL;
        test1 |= 0x00000001;       // set bit 0 (WRTEN)

        Fray_PST->LCK_UN.LCK_UL=0x00007500;
        Fray_PST->LCK_UN.LCK_UL=0x00008A00;
        Fray_PST->TEST1_UN.TEST1_UL = test1;
        // unlocking config state to switch to async transfer mode
        Fray_PST->LCK_UN.LCK_UL=0x000000CE;
        Fray_PST->LCK_UN.LCK_UL=0x00000031;
        test1 = Fray_PST->SUCC1_UN.SUCC1_UL;
        test1 |= (CMD_ASYNCHRONOUS_TRANSFER_MODE);
        test1 = test1&0xfffffffe;
        Fray_PST->SUCC1_UN.SUCC1_UL=test1;

    Let me know if this works for you.

    Regards,

    Abhishek

  • Hi

    Thank you for you quick reply!

    @ Zhaohong: thanks for that link, but for this example external wires are necessary, so it does not realy solve my problem.

    @Abishek: I took your code and changed it slightly to enter loopback mode and it works perfect!! Problem solved! 

    Thanks

    Christian

  • Hi everybody!

    I was too enthusiastic. it may enter the loop back mode, but it does not send/receive anything. TXRQ flag is set, but nothing more.

    Any ideas? I basically use Zhaohong´s code with Abisheks addition.

    Thanks

    Christian

  • Christian,

    I am attaching an example for Flaxray internal loop back. It is verified on a TMS570 EVM with CCS5. The project path is a little complicated because it is extracted from a big database and converted from a CCS3.3 project. The CCS5 project is located in subdirectory "\FRAY17_DLP_R4\platform_verif\devices\GLADIATOR\R4\FRAY1\FRAY\FRAY17_DLP\FRAY17_DLP_R4".  The ,out file is located in "\FRAY17_DLP_R4\platform_verif\devices\GLADIATOR\R4\FRAY1\FRAY\FRAY17_DLP". Since this example runs from RAM, you need to set address 0x0 to target RAM in CCS5 scripts manu before loading the .out. You can compare your code with this example.

    0272.FRAY17_DLP_R4.zip

    Thanks and regards,

    Zhaohong

  • In the above code, I find Frame CRC calculation function definition. Where in the code it is called? How this trailer bits are attached to the Frame during transmission? Header and Payload storage and transmission are obviously visible on the code, but why not Frame CRC?
  • I modified the code provided in above link to transmit one frame and receive through loopback mode. The RXI flag sets indicating reception, but the RDDS registers are not getting updated.

    My query is
    1) Does NDAT1 register update itself once new frame is received in loopback and mode?
    2) How to view the Transient Buffers to know if the Frame is received as such?
    3) Anything else to be configured other than defining obrs, rdss=1, rhss=1 before reading the RDDS register ?