Hi,
I'm currently evaluating the RM46L852 using the TMDXRM46HDK board.
I'm using the IAR tool chain and Halcogen.
I need to perform high speed serial communication over a RS485 line. In order to get baud rates around 5-6Mbps I've configure VCLK=HCLK=220MHz which enables speeds up to 6.875Mbps.
However, after I have changed the VCLK speed from the default 110MHz to 220MHz, the processor fails to boot after a reset in roughly 75% of the cases. I've using a debugger I've that in the cases where the processor does not boot properly it gets stuck in a function called "het2ParityCheck" in sys_selftest.c which is generated by halcogen.
As far as I can read in the datasheets it should by acceptable to use VCLK=HCLK.
Any suggestions?