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TMS470M Interrupt Enable

Other Parts Discussed in Thread: HALCOGEN

Hi,

I am working with the TMS470M running FreeRTOS, and am trying to enable interrupts. I used HalCoGen to enable input from the push button and enabled gioHighLevelInterrupt and gioLowLevelInterrupt. Currently, inside a periodic task I poll for the push button, and it behaves as expected, but I am unable to generate an interrupt when the button is pushed.

My question: is there a specific instruction that needs to be called to enable interrupts?
If so, what is it, and does a file need to be included in order for it to work?

As a note, the function _enable_interrupts() doesn't appear to do anything, and the function _enable_IRQ() results in a linking error.

Thanks,
Aiste

  • Aiste,

    You need to make sure the following are set up correctly for an interrupt to occur.

    (1) Enable interrupt at peripheral modules.

    (2) Enable the related bit in the VIM interrupt mask registers.

    (3) Enable interrupt in CPU (Cortex -M3 for TMS470M). You can use the following code to enable interrupts in Cortex M3.

         *(unsigned int *)0xe000e400 = 0x80a0c0e0;
        *(unsigned int *)0xe000e404 = 0x00204060;
        *(unsigned int *)0xe000e100 = 0x000000ff;
        *(unsigned int *)0xe000ed24 = 0x00070000; //enable bus error, userfail, and memfault exceptions

    (4) Put the address of the interrupt service routine in the correct location in the interrupt table. On TMS470M, the address of interrupt table is fixed.

    You need to check the content of VIM and GIO registers to make sure that software sets them correctly.

    By the way, how do you trigger the periodic tasks? Can you use an GIO pin to see if it is triggered correctly?

    Please let me know if the above answers your question.

    Thanks and regards,

    Zhaohong

  • Hi Zhaohong,

    Unfortunately, the solution still did not work.
    I thought I would respond to your answer point by point, so you can confirm that I have everything set up properly:


    1) Peripheral Modules - I have set up GPIOA, bit 7 as an input, to generate a high-level interrupt on falling edge.


    2) I have modified code in sys_vim.h and sys_vim.c in order to enable to proper interrupts. I've included the relevant portion of the code, to ensure it is set up correctly.


    sys_vim.h:

    /* Defining all Interrupt Handlers */

    #if VIM_CONFIG

    void vimCfg(void);
    void captureEventSource0();
    void captureEventSource1();

    extern void Dummy_ISR();

    #if 0
    extern void Dummy_ISR(void);
    #endif

    #if 1
    extern void esmLowInterrupt(void);
    #endif
    #if 0
    extern void sysSWInterrupt(void);
    #endif
    #if 0
    extern void rtiCompare0Interrupt(void);
    #endif
    #if 0
    extern void rtiCompare1Interrupt(void);
    #endif
    #if 0
    extern void rtiCompare2Interrupt(void);
    #endif
    #if 0
    extern void rtiCompare3Interrupt(void);
    #endif
    #if 0
    extern void rtiOverflow0Interrupt(void);
    #endif
    #if 0
    extern void rtiOverflow1Interrupt(void);
    #endif
    #if 0
    extern void Dummy_ISR(void);
    #endif
    #if 1
    extern void gioHighLevelInterrupt(void);
    #endif
    #if 1
    extern void gioLowLevelInterrupt(void);
    #endif

    .....

    #endif

    sys_vim.c:

    #pragma DATA_SECTION(VIM_TABLE, ".vim_table");

    const unsigned int VIM_TABLE[48] =
    {
    (unsigned int) &_NMI, /* Channel 0 */

    #if VIM_CONFIG
    (unsigned int) &Dummy_ISR, /* Channel 1 */

    #if 1
    (unsigned int) &esmLowInterrupt, /* Channel 2 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 2 */
    #endif
    #if 0
    (unsigned int) &sysSWInterrupt, /* Channel 3 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 3 */
    #endif
    #if 0
    (unsigned int) &rtiCompare0Interrupt, /* Channel 4 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 4 */
    #endif
    #if 0
    (unsigned int) &rtiCompare1Interrupt, /* Channel 5 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 5 */
    #endif
    #if 0
    (unsigned int) &rtiCompare2Interrupt, /* Channel 6 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 6 */
    #endif
    #if 0
    (unsigned int) &rtiCompare3Interrupt, /* Channel 7 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 7 */
    #endif
    #if 0
    (unsigned int) &rtiOverflow0Interrupt, /* Channel 8 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 8 */
    #endif
    #if 0
    (unsigned int) &rtiOverflow1Interrupt, /* Channel 9 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 9 */
    #endif
    #if 0
    (unsigned int) &Dummy_ISR, /* Channel 10 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 10 */
    #endif
    #if 1
    (unsigned int) &gioHighLevelInterrupt, /* Channel 11 */
    #else
    (unsigned int) &Dummy_ISR, /* Channel 11 */
    #endif

    .....

    #endif
    };

    The gioHighLevelInterrupt function is implemented in gio.c, and was automatically generated by HalCoGen.

    3) I put your code into my main() program, immediately after the driver initialization calls.

    4) I assume since the address of the interrupt table is fixed, nothing needs to be done on my part for this section.

    As for triggering periodic tasks, since I am using FreeRTOS, I allow the given scheduler to handle that aspect. I simply implement a task that executes every 500ms, flashes LEDs periodically, and polls for the push button (which lights up additional LEDs if activated). If you would like a complete view of the code in context of the RTOS, I can email you the project. 

    Please let me know if anything seems incorrect that I should modify.


    Best regards,


    Aiste

  • Aiste,

    In the Step2 of your post, you set up the interrupt table. You also need to set up the interrupt mask register in the VIM module so that the interrupt request can be accepted by VIM module. I am not sure if this is automatically handled by Halcogen. If it does not,  the user needs to configure it.

    Thanks and regards,

    Zhaohong

  • Hi Zhaohong,

    You're right, that was the issue. I had to manually change the register, but now they work as expected.

    Thanks for the help,

    Aiste