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How to use DCAN RAM as linear addressable storage element instead of CAN Function Message Object

Hello Support,

We are not using the available DCAN Peripheral in our system.

Now DCAN has some RAM Area allocated for CAN Message Objects.

Can you please tell me how do I use the all of DCAN RAM as linearly addressable RAM cells?

I tried with DCAN ES Register RDA Bit as HIGH as well as DCAN CTL TEST Bit as HIGH, while DCAN CTL INIT Bit is SET to HIGH.

But all the cells of DCAN RAM Area are not writable by CPU. Are all the bytes of DCAN RAM linearly addressable by CPU for READ/WRITE Access when DCAN is not being used as CAN Peripheral function?

Please help.

Thank you.

Regards

Pashan

 

 

  • pashan,

    all the bytes should be addressable by the CPU for Read/write when  the test  bit  in the DCAN CTL register is set to 1 and the RDA bit of the DCAN TEST register is set to 1(can you confirm that you were referring to the DCAN TEST register and  not the DCAN ES register in your previous mail). We are looking into our verification suite on the exact program sequence to confirm and will get back to you on this.

    Hercules forum support

  • Hello Hari,

    Sorry for typing wrong register name. Yes, I did use DCAN TEST Register for RDA Bit.

    I am waiting for your verification test result.

    Is it possible to attach the TEST CASE CODE for direct access by CPU to DCAN RAM?

    Thank you.

    Regards

    Pashan

     

  • Hello Support,

    Any update on the status of this issue?

    Thank you.

    Regards

    Pashan