Other Parts Discussed in Thread: HALCOGEN
Hi all,
I've been struggling some time now to get the SCI Rx interrupt to work but to no success.
I've also looked at the post from 15 nov from Aiste Guden and the subject "TMS470M Interrupt Enable". I believe the same approach pretty much should do it for the SCI as well.
Note! Polling the received data is no problem.
I use CCS Version: 5.2.1.00018 (latest available) and HALCoGen 03.03.01 (latest)
I followed Zhaohong's agenda from the same post 15 nov:
(1) Enable interrupt at peripheral modules.
<snip>
/** - set interrupt enable */
sciREG2->SETINT = (0 << 26) /* Framing error */
| (0 << 25) /* Overrun error */
| (0 << 24) /* Pariry error */
| (1 << 9) /* Receive */
| (0 << 1) /* Wakeup */
| (0); /* Break detect */
<snip>
(2) Enable the related bit in the VIM interrupt mask registers.
In sys_vim.c in function void vimCfg(void) (which is called from NVIC_enable(), see below):
(VIM_CONFIG is defined to 1)
/* enable interrupts */
vimREG->REQMASKSET0 =
(1U << 2U)
| (0U << 3U)
| (0U << 4U)
| (0U << 5U)
| (0U << 6U)
| (0U << 7U)
| (0U << 8U)
| (0U << 9U)
| (0U << 10U)
| (0U << 11U)
| (0U << 12U)
| (0U << 13U)
| (0U << 14U)
| (0U << 15U)
| (0U << 16U)
| (0U << 17U)
| (0U << 18U)
| (0U << 19U)
| (1U << 20U) // SCI2 high level interrupt enable
| (0U << 21U)
| (0U << 22U)
| (0U << 23U)
| (0U << 24U)
| (0U << 25U)
| (0U << 26U)
| (0U << 27U)
| (0U << 28U)
| (0U << 29U)
| (0U << 30U)
| (0U << 31U);
(3) Enable interrupt in CPU (Cortex -M3 for TMS470M). You can use the following code to enable interrupts in Cortex M3.
In sys_startup.c in function void NVIC_enable() which I call at the beginning of the program:
*(unsigned int *)0xe000e400 = 0x80a0c0e0;
*(unsigned int *)0xe000e404 = 0x00204060;
*(unsigned int *)0xe000e100 = 0x000000ff;
*(unsigned int *)0xe000ed24 = 0x00070000; //enable bus error, userfail, and memfault exceptions
(4) Put the address of the interrupt service routine in the correct location in the interrupt table. On TMS470M, the address of interrupt table is fixed.
In sys_vim.c:
<snip>
const uint32_t VIM_TABLE[48] =
{
(uint32_t) &_NMI, /* Channel 0 */
#if VIM_CONFIG
(uint32_t) &Dummy_ISR, /* Channel 1 */
(uint32_t) &esmLowInterrupt, /* Channel 2 */
(uint32_t) &Dummy_ISR, /* Channel 3 */
(uint32_t) &Dummy_ISR, /* Channel 4 */
(uint32_t) &Dummy_ISR, /* Channel 5 */
(uint32_t) &Dummy_ISR, /* Channel 6 */
(uint32_t) &Dummy_ISR, /* Channel 7 */
(uint32_t) &Dummy_ISR, /* Channel 8 */
(uint32_t) &Dummy_ISR, /* Channel 9 */
(uint32_t) &Dummy_ISR, /* Channel 10 */
(uint32_t) &Dummy_ISR, /* Channel 11 */
(uint32_t) &Dummy_ISR, /* Channel 12 */
(uint32_t) &Dummy_ISR, /* Channel 13 */
(uint32_t) &Dummy_ISR, /* Channel 14 */
(uint32_t) &Dummy_ISR, /* Channel 15 */
(uint32_t) &Dummy_ISR, /* Channel 16 */
(uint32_t) &Dummy_ISR, /* Channel 17 */
(uint32_t) &Dummy_ISR, /* Channel 18 */
(uint32_t) &Dummy_ISR, /* Channel 19 */
(uint32_t) &sci1HighLevelInterrupt, /* Channel 20 */
(uint32_t) &Dummy_ISR, /* Channel 21 */
(uint32_t) &Dummy_ISR, /* Channel 22 */
<snip>
Kind regards,
Lars von Wachenfeldt
