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Stellaris SSI with uDMA interrupt handling.

Hello, I'm developing an application in the EK-LM4F120XL board.

I'm transferring data with the uDMA module from a memory buffer to the SSI0 peripheral.

The documentation for the stellarisware software says the following in the uDMAIntRegister function:

The interrupt handler for the uDMA is for transfer completion when the channel
UDMA_CHANNEL_SW is used and for error interrupts. The interrupts for each peripheral
channel are handled through the individual peripheral interrupt handlers.

But when I look at the documentation for the SSIIntEnable it says:

This function enables the indicated SSI interrupt sources. Only the sources that are enabled
can be reflected to the processor interrupt; disabled sources have no effect on the processor.
The ulIntFlags parameter can be any of the SSI_TXFF, SSI_RXFF, SSI_RXTO, or SSI_RXOR
values.


I can't understand the meaning of the various parameter names, can someone explain them?

In the datasheet for the LM4f120H5QR it says that the SSI Raw or masked Interrupt Status Register TXRIS or TXMIS will be set when the buffer it's half or less empty and that EOT bit it's set when the transfer it's over.

The description for EOT says:

0 The TXRIS interrupt indicates that the transmit FIFO is half full or less.
1 The End of Transmit interrupt mode for the TXRIS interrupt is enabled.
Note:
When using μDMA, the EOT bit cannot be set to '1' in any
mode. If used with μDMA, it prevents DMATXRIS from
asserting. If the EOT bit is kept at '0' during operation, an
interrupt is still generated when the TX FIFO is half or less
full with or without using the μDMA.

From what I understood I don't know if I should just catch the interrupt on TXRIS/TXMIS or also check the EOT bit (eg, just check the SSIBusy function). I haven't been able to find any information on DMATXRIS.

What's the correct way to register an interrupt on completion of the burst transfer for SSI0?

Thanks in advance.