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TMS570LS1227 SCI Data not transmetted

Hi.

I am using a TMS570LS1227PGEQQ1

I enable SCI driver.

SCI base 0xFFF7E500U

In sciInit()

the init is :

/** - bring SCI out of reset */
    sciREG->GCR0 = 1U;
    sciREG->GCR1 = (0 << 7);   /* stay in reset */
    /** - Disable all interrupts */
    sciREG->CLRINT    = 0xFFFFFFFFU;
    sciREG->CLRINTLVL = 0xFFFFFFFFU;

    pinMuxReg->PINMUX7 =    PINMUX_PIN_38_SCIRX;
    pinMuxReg->PINMUX8 =     PINMUX_PIN_39_SCITX;


    /** - global control 1 */
    sciREG->GCR1 = (1 << 25)  /* enable transmit */
                  | (1 << 24)  /* enable receive */
                  | (0 << 16)   /* loop-back disabled 0*/
                  | (1 << 5)   /* internal clock (device has no clock pin) */
                  | (0 << 4)  /* number of stop bits */
                  | (0 << 3)  /* even parity, otherwise odd */
                  | (0 << 2)  /* enable parity */
                  | (1 << 1);  /* asynchronous timing mode */

    /** - set baudrate */
    sciREG->BAUD = 1041;  /* baudrate */

    /** - transmission length */
    sciREG->LENGTH = 8 - 1;  /* length */

    /** - set SCI pins functional mode */
    sciREG->FUN = (1 << 2)  /* tx pin */
                 | (1 << 1)  /* rx pin */
                 | (0);  /* clk pin */

    /** - set SCI pins default output value */
    sciREG->DOUT = (0 << 2)  /* tx pin */
                  | (0 << 1)  /* rx pin */
                  | (0);  /* clk pin */

    /** - set SCI pins output direction */
    sciREG->DIR = (0 << 2)  /* tx pin */
                 | (0 << 1)  /* rx pin */
                 | (0);  /* clk pin */

    /** - set SCI pins open drain enable */
    sciREG->ODR = (0 << 2)  /* tx pin */
                 | (0 << 1)  /* rx pin */
                 | (0);  /* clk pin */

    /** - set SCI pins pullup/pulldown enable */
    sciREG->PD = (0 << 2)  /* tx pin */
                | (0 << 1)  /* rx pin */
                | (0);  /* clk pin */

    /** - set SCI pins pullup/pulldown select */
    sciREG->PSL = (1 << 2)  /* tx pin */
                 | (1 << 1)  /* rx pin */
                 | (1);  /* clk pin */

    /** - set interrupt level */
    sciREG->SETINTLVL = (0 << 26)  /* Framing error */
                       | (0 << 25)  /* Overrun error */
                       | (0 << 24)  /* Parity error */
                       | (0 << 9)  /* Receive */
                       | (0 << 8)  /* Transmit */
                       | (0 << 1)  /* Wakeup */
                       | (0);  /* Break detect */

    /** - set interrupt enable */
    sciREG->SETINT = (0 << 26)  /* Framing error */
                    | (0 << 25)  /* Overrun error */
                    | (0 << 24)  /* Parity error */
                    | (0 << 9)  /* Receive */
                    | (0 << 1)  /* Wakeup */
                    | (0);  /* Break detect */

    /** - initialize global transfer variables */
    g_sciTransfer[0].mode   = 0 << 8;
    g_sciTransfer[0].length = 0;

    /** - initialize global transfer variables */
    g_sciTransfer[1].mode   = 0 << 8;
    g_sciTransfer[1].length = 0;

    /** - Finaly start SCI */
    sciREG->GCR1 |= (1 << 7);

The problem in my code I call sciSendByte function, the SCITP register is well fill by the data, but when I check the line with and oscillo, I don't see no data  transmitted.

Can anybody help me ?

Thank you.

  • Hello Francois,

    Reviewing your code I notice that you have a write to the IOMM module to enable the SCI signals to come out on their respective pins. I also don't see where you have enabled the write permission for the PINMMR registers. The IOMM has a write protection mechanism to prevent spurious writes that migth change the IO configuration of the device during run time. To enable write access to the PINMMRs, the CPU must write 0x83e70b13 to the kick0 register followed by a write of 0x95a4f1e0 to kick1 register. In addition, the CPU must be placed in priviliged mode. If a write is attempted without enabling write access, no error will be generated and the register will remain unchanged. If a write is attempted when not in privilege mode, an ESM error will occur.

  • Thank you very much.

    It's exactly, what  I have missed.