Hi there,
I'd like to run an LM4F232H5QD's ADC at 256kSPS for 8 analog input channels concurrently and average each channel's set of 256 samples every 1ms to achieve an oversampling rate of 256x and a resulting sample rate of 1kSPS. This will provide an Effective number of bits (ENOB) of 16 (from the 12 bit ADC) for each of the 8 channels.
Is this possible (i.e. is the processor fast enough ? ). A quick calc. says I need 256,000 x 8 = 2,048,000 additions per second. The processor can do 100MIPS so in theory there is enough headroom.
What is the best way to do this ? I have to rule out using Software to trigger the acquisition (ADC_TRIGGER_PROCESSOR) because it won't be fast enough and the largest ADC sequencing FIFO is only 8 samples deep.
So should I setup a timer to trigger these acquisitions (using ADC_TRIGGER_TIMER) then stream the data to 8 x 256 memory locations using uDMA ? Then in my main while loop, once every 1ms I would perform the averaging of all the data.
regards
Peter