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Automatic Reset after error detection

Yannick Charrotton
Prodigy 40 points


Hi,

Is there a way to program the ESM to directly start a reset (nRST or nPORRST) after an error detection?

Of course, without Interrupt Handling, to also have this behavior for group 3 errors.

Best regards,

Yannick

  • 0
    TI__Guru 59540 points

    Hello Yannick,

    There is no mechanism to do this through software without using an interrupt based solution. However, you might consider configuring all groups to result in an assertion of the nERROR pin and rout this through an inverter or to a FET to assert nPORRST. Note that assertion of the nPORRST will cause a complete restart and that all error related information wll be lost. This is not necessarily a recommended solution from TI and you should be certain to fully test it to any prescribed test levels required by your industry requirements to insure there are no unintended side effects and to insure that it meets whichever safety requirements apply to you application.

  • 0 in reply to Chuck Davenport
    Prodigy 40 points

    Hello Chuck,

    Thank you for your answer.

    So, what is the proposed philosophy from TI in case of error from group 3? Is it just to indicate it to an external system and continue working without any intervention?

    Best regards,

    Yannick

  • 0 in reply to Yannick Charrotton
    TI__Guru 59540 points

    Hello Yannick,

    In the end, the reaction to a Group 3 error is up to the end application and the risks associated with these types of errors. The nERROR signal is provided for connection to an external monitor which can trigger a reset or disable the device altogether by asserting nPORRST or nRST. TI offers a companion ship (TPS65381) specifically designed to take advantage of the 570's architecture and enable many of these recommended features, but there is no requirement that this chip be used.

    For the group 3 errors, these could all be caused by soft errors which would provide a path to recovery. In the case of the ESM auto load error, a Group 1 error will also be generated which can be configured to generate an interrupt if one is desired. When an autoload error is received, the eFuse controller can be ran through a self test mechanism to determine if it is functional or not and appropriate action can be taken.

    Similarly, if an uncorrectable error occurs for RAM or Bank 7 flash, the source of the error can be read from the uncorrectable error address register and the data refreshed or re-initialized. Again, there is a path to recovery or to put the device into a safe state should the fault be deemed unrecoverable.

    In your original question, you asked how to put the device into reset upon any ESM error including Group3 errors. One possible solution was provided but there are other options as well such as using the TPS companion chip or by designing a reset supervisor with an enable that could be driven by the nERROR pin. In the case of the TPS chip, the device can be programmed with a set quantity of nERROR assertions that would cause the TPS chip to assert the nPORRST pin so that it could be reset on the 1st occurance or on the nth depending on the level of system risk/susceptibility you have to potential soft errors.