Hello Support,
In the HTU GC Register, when HTU EN Bit is ZERO, HTU PCR Register PARITY_ENA = 0x0A, then is there any possibility of Parity Error [ESM Channel 8] when CPU Read DCP RAM assuming there is Parity Error already present with DCP RAM Area?
Or, Parity Error is not enabled to ESM Module Channel 8 if HTU EN Bit = ZERO in HTU GC Register.
Is there any relation between HTU Parity Error to ESM Channel 8 connection with HTU EN Bit of HTU GC Register?
Any information about the inter-relation between HTU Parity Error, ESM Channel 8 and HTU EN Bit will be helpful for case where CPU is the Master reading from DCP RAM with Parity Error present within DCP RAM.
Thank you.
Regards
Pashan
