Dear Experts,
One of my customers is using SD XDS560V2 to debug TMS470M06607.
They encountered an error when perform the "Test Connenction" in CCS v5.
The JTAG test log is copied as below.
Does anyone know what is wrong with the connection?
//*****************************************************************************************************//
[Start]
Execute the command:
%ccs_base%/common/uscif/dbgjtag.exe -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
[Result]
-----[Print the board config pathname(s)]------------------------------------
C:\Users\LENOVO\AppData\Local\.TI\1212777678\
0\0\BrdDat\testBoard.dat
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 560/2xx-class product.
This utility will load the program 'sd560v2u.out'.
The library build date was 'May 30 2012'.
The library build time was '23:17:26'.
The library package version is '5.0.747.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
The cable+pod has a version number of '8' (0x00000008).
The cable+pod has a capability number of '7423' (0x00001cff).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the Nano-TBC VHDL.
The link is a 560-class second-generation-560 cable.
The software is configured for Nano-TBC VHDL features.
The controller will be software reset via its registers.
The controller has a logic ZERO on its EMU[0] input pin.
The controller has a logic ZERO on its EMU[1] input pin.
The controller will use falling-edge timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '2' (0x0002).
The utility logic has not previously detected a power-loss.
The utility logic is not currently detecting a power-loss.
An error occurred while hard opening the controller.
-----[An error has occurred and this utility has aborted]--------------------
This error is generated by TI's USCIF driver or utilities.
The value is '-286' (0xfffffee2).
The title is 'SC_ERR_CLK_PLL_HUNG'.
The explanation is:
The PLL programming function has suffered a timeout.
This may be an honest-to-goodness software or VHDL bug.
[End]
