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On Stellaris Launchpad, UART RX UDMA Ping-Pong transfer does not interrupt after primary buffer is full.

Sign Bit
Expert 1570 points


Greetings,

I am trying to receive some data using from an UART using ping-pong DMA (I pretty much copied and pasted the UART/uDMA code from the "ek-lm4f120xl\udma_demo" sample, except I'm using UART0 and no loopback.  I have set a breakpoint in UART0IntHandler and it gets called when both the primary and alternate buffers are filled with data (as checked by both inspecting the buffer contents and verifying that uDMAChannelModeGet() returns UDMA_MODE_STOP for both UDMA_CHANNEL_UART0RX | UDMA_PRI_SELECT and UDMA_CHANNEL_UART0RX | UDMA_ALT_SELECT .

I read both the MCU datasheet and the peripheral library manual, as well as searched the web and this forum - and all the mentions that I found for interrupts specify that in ping-pong mode I should expect an interrupt after each buffer is filled.

Thank you for any suggestions,

florin

  • 0
    TI__Expert 3445 points

    Florin,

    It looks like the DMA transfer is continuing to run in the background while the debugger has stopped the part. If you step through the code after the breakpoint being hit, you will see uDMAChannelModeGet return UDMA_MODE_STOP for both the primary and alternate channels.

    If you'd like to confirm this explanation, you can modify the UART interrupt handler. Call UDMAChannelModeGet and set one GPIO high and one GPIO low depending on whether the primary or alternate transfer is stopped. Then run the program without a breakpoint and attach an oscilloscope to the 2 GPIOs. The GPIOs should alternate between the primary and alternate channels.

    If the GPIOs both go high at the same time, meaning the interrupt only happens after both transfers are complete, put the same test code into the udma_demo example and retest.

  • 0 in reply to Stellaris John
    Expert 1570 points

    John,

    Thanks for the explanation - I believe it, but I have since modified the code once I understood the interplay between the FIFO interrupt level and the receive timeout interrupt and I cannot readily test it.

    Since it seems that you can't set up a DMA transfer that will shift 'up to' X bytes into a buffer then interrupt when X bytes have been transferred or when the other end stopped the transmission and since I don't know the amount of data to receive beforehand, I implemented the transfer by hand in using the 'uart watchdog timer'.

    florin