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difference between writing linker file (.cmd)in stellaris vs picolof2069)

Hi,

Now i am working in stellaris lm4f232h5qd controller i have noticed difference in style of writing linker command .cmd file between stellaris vs c2000 is due to stellaris is based on arm architecture and picolo based on c28x architecture. please find .cmd files of the two.My question is to adopt any one way of writing .cmd or it is specific architecture.

 picolo

MEMORY
{
PAGE 0: /* Program Memory */
L3DPSARAM: origin = 0x009000, length = 0x1000
L4SARAM: origin = 0x00A000, length = 0x2000

PAGE 1: /* Data Memory */
M0SARAM: origin = 0x000000, length = 0x0400
M1SARAM: origin = 0x000400, length = 0x0400
L0DPSARAM: origin = 0x008000, length = 0x0800
L1DPSARAM: origin = 0x008800, length = 0x0400
L2DPSARAM: origin = 0x008C00, length = 0x0400
L5DPSARAM: origin = 0x00C000, length = 0x2000
L6DPSARAM: origin = 0x00E000, length = 0x2000
L7DPSARAM: origin = 0x010000, length = 0x2000
L8DPSARAM: origin = 0x012000, length = 0x2000
}


SECTIONS
{
.text: > L4SARAM PAGE = 0
.ebss: > M0SARAM PAGE = 1
.cinit: > L4SARAM PAGE = 0
.stack: > M1SARAM PAGE = 1
.reset: > L4SARAM PAGE = 0, TYPE = DSECT /* not using .reset section */
}

stellaris

/******************************************************************************
*
* timers_ccs.cmd - CCS linker configuration file for timers.
*
* Copyright (c) 2011 Texas Instruments Incorporated. All rights reserved.
* Software License Agreement
*
* Texas Instruments (TI) is supplying this software for use solely and
* exclusively on TI's microcontroller products. The software is owned by
* TI and/or its suppliers, and is protected under applicable copyright
* laws. You may not combine this software with "viral" open-source
* software in order to form a larger program.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
* NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
* CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
* DAMAGES, FOR ANY REASON WHATSOEVER.
*
* This is part of revision 8049 of the EK-LM4F232 Firmware Package.
*
*****************************************************************************/

--retain=g_pfnVectors

/* The following command line options are set as part of the CCS project. */
/* If you are building using the command line, or for some reason want to */
/* define them here, you can uncomment and modify these lines as needed. */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone. */
/* */
/* --heap_size=0 */
/* --stack_size=256 */
/* --library=rtsv7M3_T_le_eabi.lib */

/* The starting address of the application. Normally the interrupt vectors */
/* must be located at the beginning of the application. */
#define APP_BASE 0x00000000
#define RAM_BASE 0x20000000

/* System memory map */

MEMORY
{
/* Application stored in and executes from internal flash */
FLASH (RX) : origin = APP_BASE, length = 0x00040000
/* Application uses internal RAM for data */
SRAM (RWX) : origin = 0x20000000, length = 0x00008000
}

/* Section allocation in memory */

SECTIONS
{
.intvecs: > APP_BASE
.text : > FLASH
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH

.vtable : > RAM_BASE
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM
}

__STACK_TOP = __stack + 1024;

  • Appears that memory/segment definitions are different for each.  Thus your goal of using one common linker will require extra work on your part. 

    Some review of the many Stellaris examples will provide you insight as to the why/how the Stellaris linker functions.  To port across your earlier C2K work you will have to understand those past definitions - and replace those with ones more appropriate (and in play) w/in Stellaris.

  • Hi cb1,

    ya memory segment will vary for both controllers .In picolo linker file i can find section like PAGE 0 : (program memory) PAGE 1: (data memory) , so it is easy for to understanding .Is it possible for me  define PAGE0  and PAGE1 in stellaris linker file too.

     

  • Hi Tamil,

    One would think so - depends upon your IDE.  I use IAR - you CCS - perhaps there's some write-up on the linker w/in CCS.

    May be helpful for you to review the larger M3 MCUs - which have external bus capabilities.  (thus many more memory segments illustrated)  Handling/management of the linker here - with added detail - should prove most beneficial to you.  Wish you success...