TMS470R1B1M external interrupts C source code

Hi, Zhaohong,

I tried to use the code you sent with TMS470R1B1M registers.  When it is under debugger mode it runs OK.  But when I take debugger out and power up our controller board, the software does not run.  I don't know where I did wrong.

Here is the code related to external interrupt, we use GIOA[0] and GIOA[1] falling edge as external interrupt:

Thanks, Jian

==============

uint32_t InitGIO ( void )
{

ExtIntrptSetup( );

}

#define ENABLE_E_INT0_INT1 0x00000003UL
#define E_INT0_RISING_EDGE 0x00000001UL
#define E_INT1_RISING_EDGE 0x00000002UL
#define E_INT0_HI_PRIORITY 0x00000001UL
#define E_INT1_HI_PRIORITY 0x00000002UL
#define E_INT0_OUTPUT 0x01U
#define E_INT1_OUTPUT 0x02U
void ExtIntrptSetup ( void )
{
GIOENA1 |= ENABLE_E_INT0_INT1;
GIOPOL1 &= ~(E_INT0_RISING_EDGE | E_INT1_RISING_EDGE); // both falling edge
GIOPRY1 |= ( E_INT0_HI_PRIORITY | E_INT1_HI_PRIORITY );
GIODIRA &= ~(E_INT0_OUTPUT | E_INT1_OUTPUT); // both inputs

REQMASK |= 1 << CIM_GIOA;
}

#define V_SHOCK 0x00000001UL
#define H_SHOCK 0x00000002UL

uint32_t vshock_cnt = 0x00000000UL;
uint32_t hshock_cnt = 0x00000000UL;

__irq __arm void IRQ_Handler(void)
{
uint32_t GIO_flag;

switch ((0xff & IRQIVEC)-1)
{

case CIM_GIOA: // ch5
GIO_flag = GIOFLG1;
switch ( GIO_flag )
{
case V_SHOCK:
GIOFLG1 |= V_SHOCK; // clr flag
vshock_cnt++;
break;
case H_SHOCK:
GIOFLG1 |= H_SHOCK; // clr flag
hshock_cnt++;
break;
default:
break;
}
break;

}

Jian,

I think that there is something wrong in your software. I would like to propose the following method to debug this issue.

First, change the source code for address 0x0 to "b #-8" from "b _c_int00" and reprogram Flash. After power on reset, you will see CPU is looping around address 0x0 and everything on the MCU is at default condition. Then you use debugger to control the flow and debug the problem. It is extremely important that you do debugging in a repeatable condition.

Thanks and regards,

Zhaohong

Hi, Zhaohong,

I agree with you that there is something missing on this part of code, because if I comment out this part of code, the software runs perfectly without debugger. Maybe I missed to set up some control registers...

When I use debugger, the first instruction is from cstartup.s. The stopping place is "__iar_program_start: MRS r0, cpsr". It does not stop at address 0x0.

Thanks, Jian

Jian,

Take a look at the source code for your interrupt/reset vectors. It should be placed at address 0x0.  After power on reset, CPU runs from address 0x0. It is the first location of the interrupt vector. If you use TI compiler, it will be something like "b _c_int00". The reason to replace it with "b #-8" is that before you connect debugger to CPU, CPU has been running a while after reset. What you see is not the default condition. With "b #-8" at address 0x0, CPU will be held at address 0x0 when your debugger is connected. Everything will be at default.

Thanks and regards,

Zhaohong

Zhaohong,

1. I am using IAR Embedded Workbench IDE.  At 0x00 it branches to cstartup.  Then it branches to __iar_program_start where the debugger stops after hooking up debugger.  IRQ_Handler is not located at 0x00.

I took screenshots.  Also attached a startup file from IAR.

2. Can you check if I missed any register setup to use external interrupts from my source code?  In doc spnu192d.pdf page 31, ENA1_A field, there is a note:

"Two bits must be set within the CIM (central interrupt manager) in the interrupt mask register (REQMASK). The REQMASK register must be configured to enable the appropriate interrupts. Additionally, the CPU must be configured to recognize interrupt requests."   I don't know which two bits it is referring to.  Maybe this is the source of problem?

Thanks, Jian

8015.screenshots.docx0537.cstartup.s

Jian,

In your start up code, would you please change "B   __iar_program_start" to "b #-8"? When you connect debugger to CPU after reset, you will see PC is locked to this instruction at address 0x0. In TI CCS, you can use the "Set PC to Cursor" function to force PC go to the address of __iar_program_start. Then start debugging. I think that there should be a similar function in IAR tool. Because you want to check if interrupts are handled correctly, you should insert breakpoints and let CPU run to the breakpoints. Do not stepping.

For the interrupts to be enabled, you will have to set the associated bits in the interrupt mask register of the CIM module. There is one bit for GIO interrupt A and one for GIO interrupt B. I believe those are the two bits referred in the GIO spec.

Thanks and regards,

Zhaohong