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LM4F120H5QR SSI1

Hello,

  Can anyone explain why SSI1Tx is on both pin 29 and 64, and SSI1Rx on pins 28 and 63? I am expecting that it would allow use with one of the other peripherals that are on those pins at the same time (like WT3 or T0, but not sure.

Larry 

  • Larry:

    Do you have the PINMUX? Utility?

    http://www.ti.com/sitesearch/docs/universalsearch.tsp?searchTerm=PinMUX&linkId=1

    If not, download it and install it. Note that if you configure both ADC0 and SSI1 -- then the SSI1 will indeed switch to being configured on the alternate pins.

    You can generate your header code directly with the utility -- it is handy. It lets you more easily plan how to configure your pins.

  • On another note... If you have not visited the Launchpad page -- do so. Answers to many Future Questions will be there -- preventing the Future Crime of asking questions to which you should know the answers... ;-)

    http://www.ti.com/ww/en/launchpad/stellaris_head.html

    Also visit the training wiki if you have not done so...

    http://processors.wiki.ti.com/index.php/Getting_Started_with_the_Stellaris_EK-LM4F120XL_LaunchPad_Workshop?DCMP=stellaris-launchpad&HQS=stellaris-launchpadtraining

    It also has a link on the same page -- The Workshop as it is called...

  • Dave,

    I suspected as much. I do not have the utility, but will download and install. I am sure that it will save me (possibly many hours) of debug time!

    Thanks,

    Larry

  • Larry:

    No problem. It will save you much time.

    BTW -- you marked YOUR post (not mine) as the verified answer. Was that your intent?

  • No,

       I did not realize  that I was marking my own post.

    Larry