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Interrups While writing to the flash

Poldi
Prodigy 80 points

Hi,

I have questions related to the Hercules mcu TMS570LS313 running with OS FreeRTOS and LWIP TCP/IP Stack provided from TI.

I try to write data (30Kbytes all equal 0x22) to the Flash Bank 1 using the F021 Flash API. This work fine when I Enter a critical Section (disable all interrups) while the FSMStatus is busy:

...

oReturnCheck = Fapi_issueProgrammingCommand(pDest, pSrc, 1, 0, 0, Fapi_DataOnly);

taskENTER_CRITICAL(); // disable all interrups

while(Fapi_checkFsmForReady() == Fapi_Status_FsmBusy){};

taskEXIT_CRITICAL(); // enable interrups

oReturnCheck = Fapi_getFsmStatus();

...

When I run the same code without disabling the interrups, the write to the flash go wrong. I.e., there are 1 or 2 Bytes in the flash with the value 0x00 instead of 0x22.

My Quetion:

Is it necessary to disable all the interrups while writing to the flash?

OR there is another possibility to manage this?

Regards

 

  • 0
    TI__Mastermind 22375 points

    Poldi,

    Yes it is necessary to disable all interrupt when Flash API are used.

    Flash programming involves specific timing and this cannot be interrupted.

  • 0
    TI__Genius 9015 points

    Hello Poldi,

    Jean-Marc's answer is incorrect for our 65nm (F021) devices as interrupts do not have to be disabled for Flash operations and in fact has the ability to generate an interrupt when the FSM finishes an operation (This will be exposed in the next version of the F021 Flash API).

    The restrictions during Flash operations is a read cannot be done on the bank that an erase or program operation is being executed on.  Therefore, for your example, all code and data need to reside in Flash Bank 0 or RAM while the programming operation was occurring on Flash Bank 1.

  • 0 in reply to John Hall
    Prodigy 80 points

    Hi John Hall,

    Thanks for your answer.

    I look at the map file (see below) from the test project and the Bank1 is unused. There are 100% no read / erase operation occurs while writing to the flash bank1.

    Notice: The write to flash Bank1 works fine when the LWIP Stack is not running. There, it is not necessary  to disable all the interrups. The LWIP Stack works with interrups!

     

    Therefore I think the Jean-Marc' answer is correct.

     

    MEMORY CONFIGURATION

    name origin length used unused attr fill

    ---------------------- -------- --------- -------- -------- ---- --------

    VECTORS 00000000 00000020 00000020 00000000 X

    FLASH0 00000020 0017ffe0 0004e469 00131b77 R X

    FLASH1 00180000 00180000 00000000 00180000 R X

    STACKS 08000000 00001500 00000000 00001500 RW

    RAM 08001500 0003eb00 00035e05 00008cfb RW

    SDRAM 80000000 00800000 00010000 007f0000 RW

  • 0 in reply to Poldi
    TI__Genius 9015 points

    Hello Poldi,

    What I describe is per device design.  Based on your code fragment:

    oReturnCheck = Fapi_issueProgrammingCommand(pDest, pSrc, 1, 0, 0, Fapi_DataOnly);

    taskENTER_CRITICAL(); // disable all interrups

    while(Fapi_checkFsmForReady() == Fapi_Status_FsmBusy){};

    taskEXIT_CRITICAL(); // enable interrups

    oReturnCheck = Fapi_getFsmStatus();

    The FSM is already executing before you have disabled interrupts.  Fapi_checkFsmForReady() is only reading the FMSTAT register in the FMC and masking the Ready/Busy bit only. 

    We need to determine why you are seeing the behavior you are experiencing.

  • 0 in reply to John Hall
    Prodigy 80 points

    may be this is a bug in the F021!

    please let me know, when you need more information.

    thanks for your support

    regards

  • 0 in reply to Poldi
    TI__Genius 9015 points

    Poldi,

    We believe one of the interrupt service routines that is being executed within your code is unintentionally modifying a register or memory location causing the data corruption you are seeing.

  • 0 in reply to John Hall
    Prodigy 80 points

    John,

    we are using the "standard" ISRs from LWIP (provided by TI):

    Receive Interrupt: lwIPRxIntHandler(unsigned int instNum)

    and

    transmit interrup: lwIPTxIntHandler(unsigned int instNum)

    There is no memory access to the flash bank1!

    Furthermore i detect the data corruption with the  F021 API Call:

    oReturnCheck = Fapi_doVerifyByByte(u32Index, length, au8DataBuffer, poFlashStatusWord);

    if(oReturnCheck != Fapi_Status_Success)

    {.....}

    That mean the data to be writen into the flash is OK and i checked this with the CCS debugger.

    Thanks for your support

    regards