I am consulting the technical reference manual for TMS570LS31x/21x 3276.techrefmanualspnu499a31x.pdf. In the TCRAM control and status registers Index (6.7) specifically section 6.7.5 RAMERRSTATUS : in table 6-6. In the last row SERR - Description: Should it be "This bit mut be cleared by writing '0' ....." rather than "..by writing '1'..." ?