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Is there an error in the technical reference Manual spnu499a section 6.7.5?

I am consulting the technical reference manual for TMS570LS31x/21x 3276.techrefmanualspnu499a31x.pdf. In the TCRAM control and status registers Index (6.7) specifically section 6.7.5 RAMERRSTATUS : in table 6-6. In the last row SERR  - Description: Should it be "This bit mut be cleared by writing '0' ....." rather than "..by writing '1'..." ?

  • Hi,

        I just talked with our TCRAM expert and checked the RTL code of this module, the conclusion is that our TRM is correct. It should be clear the flag by writing 1, not 0.

    The reason why we design the logic like this is  that writing 1 is more efficiency and quick then writing 0. since writing 1 only needs one instruction and writing 0, you

    need to read the data first, then modify it and finally write it back.

    Thanks,

    Ken