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LaunchPad LM4F120 ADC noise



Does anyone know what sort of noise performance to expect on the LaunchPad? I realise that VDDA and VDD are connected on the board and that grounding and quiet references are key to ADC performance, but I find with an opamp buffered pot  feeding ADC0 from pin PE3 and using sequence3 software triggered, I can only get about 7bits stable which corresponds to (3.3/128) 26mV noise. This doesn't matter on my prototype, but I need to get 10bit resolution (3mV noise) on the end product. Any tips would be greatly appreciated - it's quite a complicated beast this ADC! I'm using the Library software and the simple ADC example from Stellarisware.

cheers

Rich

  • Like you - we realized less than optimal ADC performance when driving the ADC input directly from op-amp (rigged in V Follower mode). 

    To limit this issue - have you any high speed clocking activities at/around this ADC input trace?  Are any known noise generators (i.e. clock signals, PWM outputs, being serviced by the MCU while you're testing the ADC?)  May be wise to limit such operations - at least so that a baseline ADC performance may be charted.

    MCU data manual (buried far to the rear) provides some ADC input spec.  (also appears in ADC chapter)  Try best you can to match input impedance/resistance between ADC's input - and your external signal.  (likely you must insert some series R)  Sample/hold Cap appears @ ADC input - this "C" must have time to charge/discharge for your readings to be of highest accuracy.  (some resistor value "trial/error/calculation" may prove helpful)

    Might you be making readings too quickly - or do your readings occur during some predictable power/voltage "disturbance?"  I'd also be wary of your hook-up, connection routings between opamp board & MCU board.

    We don't like launchpad - have our own M4 (this vendor + others) on custom pcb - and usually realize under 10mV of noise - often 1/2 that.  However MCU equipped ADCs are not famed for high precision (much going on inside the MCU die) and may not always be, "Good for Gov't work..."

  • Thanks for the support cb1_mobile - as you suggest I have shut-down almost all other cpu activity to avoid confusion.

    I also have put 470R in series with opamp output to match data sheet Rs. This seemed to make no difference

    I have just lifted the VDDA pin from the board and connected it to a separate reference (which supplies the pot as well of course). This has improved the performance :)

    Your comment "making readings too quickly" - that's what I thought too, especially as I now notice the temperature sensor readings I am reporting are being affected by the pot position - sounds like mux settling times etc - but using the Stellaris sequencers (new to me) it seems I have no control over this - is this right do you know?

    Cheers

    Rich

  • Should you have a separate VDDA pin (and appears you do) that is always best method.  We used mini ferrite bead - and cap - installed as close as possible to VDDA on our 64 pin M4 MCU - improved performance.

    You can control the conversion rate (believe 250K - 1MSPS) via a Stellaris Command.   Appears (at least to me, few others) that too quick (i.e. back to back - w/in a multi-channel ADC Sequence) will cause undesired channel "bleed" - if V_Delta (between channels) is sufficient.  (again - the ADC input C must be given adequate time)  On critical ADC readings - we don't allow "back to back" channel readings.  (thus an 8 channel sequence reduces to 4 usable conversions)

    As past stated - you may have to experiment w/different value, external series Rs.  Surprisingly - we got better results w/out the interposed op-amp!  (just driving ADC directly from 10K pot.

  • Many thanks for your help.

    I'm now confident that with a carefully laid out multi layer board I will get the 9bit performance I need.

    Rich

  • Thank you, Sir - green tick always appreciated...  Glad to have assisted...

    Should you have the time/interest - you may experiment - driving "back to back" ADC Sequenced Conversions - to different Port-located ADC Channels.  (i.e. our 64 pin M4 ADCs span Ports B, D & E)  Suppose only 1 "C" is in play - but if not - this may mitigate the "back to back bleeds" we noted...

    You may also dial Sequence Conversion Rate - up/down - see if (and how) this impacts...  (insure back to back conversions have > 1V V_delta - fed to back to back ADC Channels)