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UART 2 on PortD with EKS-LM4F232 Evaluation Kit

We are trying to set up UART #2 on PortD bits 6 & 7 (pins 143 & 144) on the LM4F232 eval board (and yes we are using a TTL to 232 level shifter when connecting to a PC). I have been able to get the Rx side of things working correctly on this UART but am unable to get the Tx side of things working at all.

We have also tried to set up the PortD pins as GPIOs and toggle them independently and are able to toggle each one with the exception of pin 7.

Is this something that should work? Has anyone successfully accomplished this?


Here is the setup code which we are using to set up the UART (have tried with and without the UARTEnable(UART2_BASE) line below):

// Enable the peripherals
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
GPIOPinConfigure(GPIO_PD6_U2RX);
GPIOPinConfigure(GPIO_PD7_U2TX);
GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6 | GPIO_PIN_7);
// configure UART baud, data bits, parity, stop bits, and flow control
UARTConfigSetExpClk(UART2_BASE, SysCtlClockGet(), MODBUS_UART_BAUD, MODBUS_UART_CONFIG);
UARTFlowControlSet(UART2_BASE, UART_FLOWCONTROL_NONE);
// UARTEnable(UART2_BASE);

Looking at the schematic all the PortD pins are unused by other things on the board so this theoretically should work, right?

  • Quickly (off to meeting) PortD_7 may be "NMI" - thus requires special "Unlock" procedure - to liberate/free from its default mode.

    GPIO section of your MCU data manual should clarify/confirm.

    We used that part 8 months past - have different M4 now - I'm operating strictly from "hunch/memory..."

    Fact that you cannot even GPIO "toggle" suggests some "hope" for my diagnosis - or may indicate that pin/trace is victim of some unwanted connection bridge...

  • This seems to be the case after reading the documentation on these pins. Though I am not seeing a way using StellarisWare to enable configuration of this pin. I was able to get it working with the following code but would really like to have a "cleaner" way to do this which uses StellarisWare functions instead of direct register access. Is there a way to do this?

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
    GPIOPinConfigure(GPIO_PD6_U2RX);
    // unlock PD7
    HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD;
    HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0xFF;
    GPIOPinConfigure(GPIO_PD7_U2TX);
    HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x7F;
    HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_M;
    GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6 | GPIO_PIN_7);
    // configure UART baud, data bits, parity, stop bits, and flow control
    UARTConfigSetExpClk(UART2_BASE, SysCtlClockGet(), MODBUS_UART_BAUD, MODBUS_UART_CONFIG);
    UARTFlowControlSet(UART2_BASE, UART_FLOWCONTROL_NONE);
    // UARTEnable(UART2_BASE);
    
    
    Thanks!
  • Perhaps your kind, Verified Answer tick would better guide others - impaled upon this same dilemma...

    Glad to have assisted...

  • Do you have any more information on how to do this with a StellarisWare function and not directly accessing the registers?

  • In/out of meetings @ the moment - if you can wait till late in day (or weekend) I'll further detail.  Code listing you employed (but for few values) is very close to ours.  (although have not used that MCU in ages...)

    Thanks much your neat tick...

  • tries with resistors pull-up

    GPIOPadConfigSet(GPIO_PORTD_BASE, GPIO_PIN_6 | GPIO_PIN_7, GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU);

    I could set "5 UARTS" 0,1,3,5 and 7, but I need 2.4 and 6

  • how can do work as UART 4 and 6?