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Assigning ADC Interrupts in Sys/BIOS

Benjamin Fitzpatrick
Expert 1390 points

Other Parts Discussed in Thread: SYSBIOS, LM3S6965

We're having an issue assigning some interrupts to control an ADC sequence. Here's my code:

ADCSequenceConfigure(ADC0_BASE, ADC_SEQUENCER, ADC_TRIGGER_TIMER, 0);
ADCSequenceStepConfigure(ADC0_BASE, ADC_SEQUENCER, 0, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceEnable(ADC0_BASE, ADC_SEQUENCER);
ADCIntRegister(ADC0_BASE, ADC_SEQUENCER, task_timer); 
ADCIntEnable(ADC0_BASE, ADC_SEQUENCER);

The problem we're seeing is that when we put in the ADCIntRegister call, we get "run placement fails for object ".vtable""

Looking at some other forum posts, the typical comment on issues with ADCIntRegister seems to be "Oh yeah, that'll happen. Don't do interrupts with ADCIntRegister, instead manually assign them using your .s file"

I'm using Sys/Bios though, and don't appear to have a .s file, nor do I see anything in my .cfg file that lets me manually assign these interrupts to fire when the ADC sequence completes. Any assistance with either creating a .s file and incorporating it into my project to handle this, or with assigning my interrupts using the .cfg file would be appreciated.

  • 0
    TI__Guru 58650 points

    Hi Benjamin,

    Have you reviewed the app note and the wiki on SYSBIOS and Stellaris?

    Regards,

    Sue

  • 0 in reply to Sue Cozart
    Expert 1390 points

    Hi Sue,

    I reviewed the document and wiki that you linked, but they seemed to be mostly generic information. I didn't see any information in there that would correct this issue - they seem to talk about hardware and software interrupts, but once again peripherals seem to not get much discussion.

    Is there anything specific in there that was supposed to solve this problem? 

    Also, a lot of this information seems to reference the LM3, whereas I am on the LM4F. I don't think that's a big deal - the chips are pretty similar sometimes - but I do wonder if all of the information here applies.

    Thanks,

    Ben

  • 0 in reply to Benjamin Fitzpatrick
    TI__Guru 58650 points

    Hi Ben,

    I've never tried to do what you are doing, so the only advice I can give is to follow the path I would to learn how to implement interrupts.  First of all, peripheral interrupts are hardware interrupts, so you should follow the steps for hardware interrupts.  The app note has a discussion on hardware interrupts that refers you both the the wiki link I provided and to the help in CCS.  In CCS, you find a SYS/BIOS user's guide that has a chapter on Configuration and Building which has a section on creating Hwi objects.  In quickly reading through this information, it seems to provide the necessary guidance to configure interrupts.

    There is no difference between LM3S and LM4F in how interrupts are handled, so don't worry that the document refers only to LM3S.

    Regards,

    Sue

  • 0 in reply to Sue Cozart
    Expert 1390 points

    Hi Sue,

    I apologize for not being clear, I've implemented other interrupts on this project. Other HWI and SWI usage seems to be pretty straightforward, especially static examples where a timer is used to fire the interrupt. The guides you linked me to seem to only cover that use-case: use cases where the peripheral is supposed to generate the interrupt and then pass it through to a function aren't covered. Timers have a special configuration section in Sys/BIOS where I can explicitly call out which function the timer is supposed to call, but ADCs, UARTs, and other peripherals don't have this.

    To be a little more explicit, this vtable problem doesn't happen until I call ADCIntRegister. Looking at the text for "IntRegister" in the StellarisWare user's guide, it says that functions of that type move the interrupt vector table from Flash to SRAM, so my guess is that I either don't have enough room in SRAM for my whole interrupt vector table, or that my SRAM is not aligned in the way that IntRegister declares that it must be. Since I don't really need dynamic interrupt vectors (static would work fine), I'd like to know how to declare this interrupt linkage statically.

    Unfortunately, none of the guides seem to give this information.

  • 0 in reply to Benjamin Fitzpatrick
    TI__Guru 58650 points

    Hi Ben,

    I'm sorry.  I wasn't sure how much familiarity you had.  Thanks for giving me the background.

    As you surmised, you can't use the IntRegister calls because they mess up the vector table.  I asked around about using the GUI, and the guy who knows best is out of the office.  However, others have had success with modifying the sysbios.cfg file in the project manually.   Here are a few lines for hooking in a UART interrupt:

    //***************************************************************************
    //
    // Hook interrupts
    //
    //***************************************************************************
    var hwiParams = new m3Hwi.Params();
    hwiParams.instance.name = "hwiUartDbg";
    hwiParams.priority = 0x80;
    Program.global.hwiUartDbg = m3Hwi.create(22, "&SMC_DebugIntHandler", hwiParams);

    Unfortunately, I don't have an ADC example, we apparently use polling for ADCs.  I hope that gets you going in the right direction.

    Regards,

    Sue

  • 0 in reply to Sue Cozart
    Expert 1390 points

    Hi Sue,

    Thanks, that helps a lot. I think I understand how to create a new HWI this way.

    The document you linked (the user's guide) also has information on this, and it says that number, 22, is "the interrupt number being defined". Since my ADC is going to be generating the interrupt I want to catch, I'm going to speculate that I need this interrupt number to be some combination of the ADC I am using and the sequencer within this ADC. For example, when I call ADCIntRegister, I give it ADC0_BASE (because I am using ADC 0), and 3, which is the ADC Sequencer of ADC 0 that I am using. Is there a formula for figuring out what interrupt ID this corresponds to?

    A lot of your example code does seem to use polling for ADCs unfortunately. In most use cases I run across, a periodic ADC reading (taken at a defined interval, say every 100 us) is much more common than polling. If anyone has a chance to add to the examples in the future, a periodic ADC example using DMA or even just an interrupt-driven function to read data out would be a really useful example to have. I think it would also showcase a lot of the power of Sys/BIOS, since this is not an easy thing to get done in most frameworks. Just a suggestion for the future. 

    Thanks,

    Ben

  • 0 in reply to Benjamin Fitzpatrick
    TI__Guru 58650 points

    Hi Ben,

    I'm glad the information helped.  I will definitely pass along your request for interrupt routines for ADC.

    You can find a list of interrupts in your data sheet in the Exception Model section of the Cortex-M4F Processor chapter.  If you are using Sequencer 3 of ADC 0, you want vector number 33.

    Regards,

    Sue

  • 0 in reply to Sue Cozart
    Prodigy 70 points

    Sue and Ben,

    Thanks for the posts on this topic.  I wish that I had been able to find these last week, would have saved me some time.  I am working with porting an existing project from the LM3S6965 to the TM4C129x line of processors and this was the last issue that kept me from a successful build.  It would be extremely helpful if these registration calls were supported in the TI-RTOS environment.  At minimum, it would be helpful if a warning were generated if these calls were used...

    Thanks again,

    Sid