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How do you set the TAILD bin in timer mode register?

Kevin Adams
Prodigy 30 points

Hi,

The data sheet for the LM4F232 states on page 715:

If software updates the GPTMTnILR or the GPTMTnPR register while the counter is counting down, the counter loads the new value on the next clock cycle and continues counting from the new value if the TnILD bit in the GPTMTnMR register is clear. If the TnILD bit is set, the counter loads the new value after the next timeout.

How do you set the TAILD bit?  Is this for 16-bit mode only and not 32-bit? Perhaps mentioning the PR register is a clue to 16 bit mode only.

If you configure TIMER0 as a 32 bit down counter (TIMER_CGF_32_BIT_PER = 0X00000022)

TimerConfigure(TIMER0_BASE, TIMER_CFG_32_BIT_PER);

TAMR ends up as 0x00000222.  TAILD isn't set.

If you try TimerConfigure(TIMER0_BASE, 0X00000122)); TAMR is still the same.  TAILD isn't set. TAPWMIE is set but only valid in PWM mode.

I am wondering what I am missing as I can't figure it out. BTW, TIMER0 CFG register is 0x00000000 which is 32 bit timer mode.

Thanks,

Kevin

 

 

 

 

 

  • 0
    Guru 26105 points

    Hi,

    This is not covered by any driverlib function, so you can do it separately this way:

    HWREG(TIMER0_BASE + TIMER_O_TAMR)  |= TIMER_TAMR_TAILD;

    The TIMER_TAMR_TAILD is defined in inc/hw_timer.h

    Petrei 

  • 0 in reply to Petrei
    Prodigy 30 points

    Petrei,

    Thanks for the quick response.  I did verify that this does set the TAILD.

    Now I have to look at my program for logic errors as currently the output being toggled doesn't vary regardless of the load value.

    I tested both in 16 and 32 bit.

    Thanks again.

    Kevin