Hi All
A quick question , does anybody have the pin to pin table of Stellaris M4F ? ( 110 , 120 ... series )
I would like to know whether i can develop using like 110 series and shift to 120 series when production.
Thanks for help !!
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Hi All
A quick question , does anybody have the pin to pin table of Stellaris M4F ? ( 110 , 120 ... series )
I would like to know whether i can develop using like 110 series and shift to 120 series when production.
Thanks for help !!
@Nathan - resourceful, helpful - hereby memorialized.
Paints perchance bigger picture - if these 2 MCU families were "designed" w/such overlap:
a) that is big/valued Selling Point - deserves better than "passing glance" at/around pg 41..
b) if this was by "intent" - has such intent continued throughout this enlarging M4 spectrum? Again - Mkt Dept not exactly, "Shouting from rooftops..."
c) beyond simple, "pin compatibility" - functional comparisons may prove of even higher value. (i.e. presence/number of key peripherals {i.e. PWM Generators - for one}) Sadly many note that device selected for lunchlaunchpad is "stripped down" version - PWM Generators not included - that lunchlaunch...
@OCY:
This reporter has never argued/pushed for "100% compatible!"
Clearly your smart, sufficiently experienced to know that Memory (Flash & SRAM, EEPROM), MCU Speed, Temp Range all classically vary - across vendor's line-up.
(one may suspect past few OCY comments result from this reporter's (yet unanswered) post in response to "road rarely travelled...")
Hi All
Thanks all you guys
the reason that i mean compatible is focusing on "don't have to change hardware / schematic".
which means pin out will not be changed.
and about page 41 table , it help me a lot
Thanks !!
Ryan(FAE) Lin said:don't have to change hardware / schematic
Ryan - while that has some appeal - is it not unduly "restrictive?" Pin for pin may suggest - but does not insure - a peripheral-capability match. And is not the ability to bring full (or at minimum high) capability one of the key appeal-points of ARM? Trading capability for compatibility - may not always be wise...
Fifteen, twenty years past - such goal was far more valid. Today's rich schematic/pcb packages - and your clever "re-use" of prior, schematic/pcb "puzzle pieces" - enables fast/eased "purpose optimized, design/built" boards. And quick-turn, discount pcb houses abound.
There's yet another method (used by our firm - and the original LMI LM3S introduction demo) - creation of unique, individual MCU "daughter boards" - which plug-in to a larger "mother board." All key MCU support components (i.e. xtal, caps, LDO treatment, reset etc.) reside on such daughter board - daughter board is designed to accommodate & throughput (GPIO) the largest candidate MCU.
This method significantly reduces the design effort, size and thus cost of the MCU-specific board - greatly aids design choice/flexibility - but is inefficient for volume production. Remains a very effective means to "eval" a variety of MCUs - accommodating (pardon) eased eval of multi-vendors. (especially important in light of recent "diplomacy-lite" M3 NRND pronouncements - high from the "mount.")