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Best option for sampling UART data stream

Bryant Tonkin
Prodigy 10 points

Hi everyone,

I'm looking for suggestions on the best way to periodically sample a UART data stream. I'm connecting to a UART device (car ECU) that outputs a continuous stream of data strings at 9600bps. The data strings are  under 8 bytes and contain a start marker and the number of bytes to follow, so it's easy to separate them out. The strings will contain information such as rpm and speed.

My question is, what's the best way to have the UART continuously receive the data stream so the most recent string is available when I need it, while at the same time keeping it's interrupts and cpu needs to a minimum? When I get ready to use a string I'd rather have data waiting than have to clear the receive buffer and wait for a new string to arrive.

My preferred method would be to allow the UART receive FIFO buffer to overflow, but I'm not sure what happens in this situation. Does the UART stop receiving or does the older data get shifted out of the buffer as new data arrives? If it's the later, I can just read the rx buffer and I'm good. If the UART stops receiving, I think I would need to setup an interrupt to copy the rx buffer to an array and clear it so it can continue to recieve.

Thoughts? Suggestions?

Thanks

  • 0
    Mastermind 9890 points

    If you allow the UART to overflow, you won't get what you want.  You'll effectively stop receiving any data, and just get an error flag indicating that you are dropping data until you start reading the FIFO out again.  So the information in the FIFO will become stale.

    If you want to actually look at the most recent string w/o waiting for a new string to come in, you can't allow the receive FIFO to overflow, you have to take the data out of the FIFO and parse it as strings.

    The good news is that 9600 baud is pretty slow (over 1ms/byte received), having interrupts based on FIFO level that pull the data out of the FIFO and do minimal parsing so that you know where the strings start and end should not impact you very much.

    If you have a part with DMA, you can have set it up so that the DMA reads from the FIFO are constantly overwriting the same buffers, and this would be ideal for your purpose.