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Connecting CFI controlled 1Gb NAND flash to TMS570

Alan Day
Intellectual 920 points

Hi Everyone,

I'm planning to connect the H27U1G8F2B (datasheet) to a TMS570, it is controlled by a CFI state machine through 8 I/O pins, as the TMS570 does not have any native support for this I guess the best way to connect the device is the following:

EMIF_DATA[7-0] to I/O[7-0]

EMIF_nWE to WE

EMIF_nOE to RE

GPIO to CE,CLE and ALE

While R/B is connected back to a GPIO as well.

The use of GPIO will keep the CE pin asserted for the full read/write period while the nWE and nOE can function as normal, as long as the process and data written/read is handled correctly there should be no problem.  Plus I believe this will be quicker than controlling the device purely by GPIOs.

Obviously this is going to be prototyped first but if there are any glaring errors in thought process please let me know!

Cheers,

Alan

  • 0
    TI__Guru**** 200976 points

    Hello Alan,

    NAND flash has 5 control signals (CS/ALE/CLE/RD/We), 8 or 16 data signals and one response signal (R/B). Commands are shifted in to the device through the data pins when CLE is active. If the command contains address, the address info are shifted into the device through the data signal when ALE is active. For command that requires long time to process, such as erase, program, the R/B signal indicates when the device is busy. So it is OK for you use GIO for CLE, ALE, and R/B. 

    Regards,

    QJ

  • 0 in reply to QJ Wang
    Intellectual 920 points

    Hi,

    As far as I can see in the TMR of the TMS570 there is no way of keeping CE asserted for multiple read/writes so again this will have to be controlled by a GPIO, can you confirm?

    Cheers,

    Alan