Haixiao or other experts,
In the earlier thread, Haixiao helped me resolved the MibSPI and DMA setting issue. (see below link)
RE: To Haixiao - TMS570LS3137 MIBSPI and DMA configuration issue
Here come the further questions based on above MibSPI and DMA setting.
I initialized the DMA channel transfer frames (each frame has one element) from MibSPI TG0 RX (ie. sourse addr) to RAM data array (i.e. destination addr).
MibSPI TG0 is triggered by external trigger signal. Each trigger let MibSPI TG0 received one data, and DMA transfers it to RAM.
I set the DMA channel is triggered by Hardware Request for each frame. (I can not use Block transfer mode in this case)
If I set the frame count = 1000, I can get 1000 data at the data array in RAM.
Now, I want a "Ping-pong" style data buffer. In other words, I will have two set of data array. Let's say Bank1 and Bank2.
I planed was to using DMA LFS interruption, in the ISR of Bank1 LFS interruption (after get 999 data to Bank1), the DMA channel Destiniation address will be changed from Bank1 to Bank2. next time will switch to Bank1 again, and so on.
My question: after the 1000 frames to BANK1 was transfered after the system initialization, how can I re-set the DMA to start the following 1000 frames to BANK2?
(It seems all settings still be effective there. My external triggers also available, but the DMA stops because the initialization 1000 frams transfer has been complete.)
This should be implemented in the DMA interruption ISR so that I can keep getting data as long as the external triggers available.
I realized there is "Auto-Initiation" feature, but it's for block transfer, won't work for my case.
Thanks in advance,
Yanzhong